Alternatives and similar repositories for rectilinear_spanning_graph

Users that are interested in rectilinear_spanning_graph are comparing it to the libraries listed below

• shininglion / corner_stitch
  Library of corner stitching structure
  ☆17Updated 10 years ago
• chengengjie / salt
  Steiner Shallow-Light Tree for VLSI Routing
  ☆52Updated 11 months ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆73Updated 7 years ago
• cuhk-eda / REST
  REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)
  ☆55Updated 3 years ago
• AUCOHL / OGRE
  Global Router Built for ICCAD Contest 2019
  ☆31Updated 5 years ago
• The-OpenROAD-Project-Attic / flute3
  Flute3 is an open-source rectilinear Steiner minimum tree heuristic from Iowa State, with UFRGS improvements
  ☆26Updated 4 years ago
• Coloquinte / Coloquinte_placement
  An analytical VLSI placer
  ☆28Updated 3 years ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆135Updated 2 years ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆38Updated 5 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆136Updated 2 years ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆127Updated last week
• The-OpenROAD-Project / TritonMacroPlace
  Macro placement tool for OpenROAD flow
  ☆23Updated 4 years ago
• The-OpenROAD-Project / PDNSim
  Power grid analysis
  ☆19Updated 4 years ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆56Updated 4 years ago
• ABKGroup / TritonRoute-WXL
  ☆30Updated 4 years ago
• Daikon-Sun / Physical-Design-for-Nanometer-ICs
  Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
  ☆41Updated 6 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 4 years ago
• UTDA-group / BoxRouter
  BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…
  ☆21Updated 6 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆37Updated 5 years ago
• aspdac-submission-pcb-layout / PCBBenchmarks
  ☆22Updated 4 years ago
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆29Updated 3 years ago
• The-OpenROAD-Project / PcbRouter
  ☆31Updated 4 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆88Updated 4 years ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆126Updated 11 months ago
• jkim971201 / SkyPlace
  ☆17Updated 9 months ago
• cuhk-eda / cu-gr-2
  ☆44Updated last year
• asyncvlsi / SPRoute
  A parallel global router using the Galois framework
  ☆29Updated last year
• CMACH508 / DeepTH
  ☆15Updated last year
• nakultirumalai / VLSIPlacement
  Code for new techniques of VLSI placement
  ☆13Updated 11 years ago
• PKU-IDEA / MacroRank
  Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)
  ☆17Updated 2 years ago