TeCSAR-UNCC / DeepDive
☆1Updated 4 years ago
Related projects: ⓘ
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆14Updated 2 years ago
- ☆19Updated 3 years ago
- ☆23Updated 2 years ago
- ☆20Updated last year
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆17Updated 4 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆31Updated 11 months ago
- [FPGA'21] CoDeNet is an efficient object detection model on PyTorch, with SOTA performance on VOC and COCO based on CenterNet and Co-Desi…☆25Updated last year
- Approximate layers - TensorFlow extension☆25Updated 4 months ago
- ☆17Updated last year
- ☆13Updated 4 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆17Updated last year
- Designs for finalist teams of the DAC System Design Contest☆34Updated 4 years ago
- ☆67Updated 4 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆30Updated 5 years ago
- ☆53Updated 4 years ago
- Systolic-array based Deep Learning Accelerator generator☆24Updated 3 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆41Updated 3 months ago
- HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference☆46Updated 5 months ago
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆22Updated last year
- Static Block Floating Point Quantization for CNN☆32Updated 3 years ago
- Fast Emulation of Approximate DNN Accelerators in PyTorch☆14Updated 6 months ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆42Updated 2 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆14Updated 5 months ago
- ☆37Updated 2 years ago
- ☆17Updated last year
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆56Updated 2 years ago
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆12Updated 2 years ago
- ☆17Updated 3 years ago
- ☆65Updated last year
- A DAG processor and compiler for a tree-based spatial datapath.☆12Updated 2 years ago