TadejMurovic / BNN_DeploymentLinks
Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing
☆12Updated 6 years ago
Alternatives and similar repositories for BNN_Deployment
Users that are interested in BNN_Deployment are comparing it to the libraries listed below
Sorting:
- An implementation of a BinaryConnect network for cifar10☆11Updated 5 years ago
- ☆14Updated 5 years ago
- ☆21Updated 2 years ago
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆12Updated 3 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆33Updated last year
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated 10 months ago
- Accelerator simulation framework using nn_dataflow traces and energy, etc. post-processing☆7Updated 6 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆18Updated 9 years ago
- Fast Floating Point Operators for High Level Synthesis☆21Updated 2 years ago
- FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.☆24Updated last year
- ☆19Updated 5 years ago
- Express DLA implementation for FPGA, revised based on NVDLA.☆9Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 4 months ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Updated 5 years ago
- An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool☆15Updated 8 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 3 years ago
- Convert C files into Verilog☆16Updated 6 years ago
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆16Updated 3 years ago
- ☆13Updated 4 years ago
- ☆19Updated 4 years ago
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Updated 5 years ago
- ☆23Updated 3 years ago
- ☆14Updated 2 months ago
- ☆16Updated 7 years ago
- Learn NVDLA by SOMNIA☆33Updated 5 years ago
- A collection of URLs related to High Level Synthesis (HLS).☆12Updated 4 years ago
- ☆12Updated 3 years ago
- ☆23Updated 2 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆21Updated last year
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago