TadejMurovic / BNN_DeploymentLinks
Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing
☆12Updated 6 years ago
Alternatives and similar repositories for BNN_Deployment
Users that are interested in BNN_Deployment are comparing it to the libraries listed below
Sorting:
- An implementation of a BinaryConnect network for cifar10☆11Updated 5 years ago
- ☆14Updated 5 years ago
- ☆21Updated 2 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆34Updated last year
- ☆20Updated 6 months ago
- ☆58Updated 5 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆141Updated 5 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 6 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆20Updated 5 years ago
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆12Updated 3 years ago
- Residual Binarized Neural Network☆43Updated 7 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆19Updated 9 years ago
- Binary Neural Network on IceStick FPGA.☆52Updated 7 years ago
- A hardware implementation of a feed-forward Convolutional Neural Network called XNOR-Net which has faster execution due to the replacemen…☆18Updated 6 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆21Updated last year
- ☆23Updated 2 years ago
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆16Updated 3 years ago
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Updated 5 years ago
- Ternary Weights and Activations☆24Updated 7 years ago
- FPGA acceleration of arbitrary precision floating point computations.☆40Updated 3 years ago
- Wallace and Dadda tree multiplier generator in vhdl and verilog☆12Updated 8 months ago
- first-order deep learning accelerator model☆19Updated 7 years ago
- ☆37Updated 3 years ago
- ☆25Updated 4 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 6 months ago
- ☆25Updated 2 years ago
- CNN accelerator☆27Updated 8 years ago
- C++ RTL simulator for EIE(https://arxiv.org/abs/1602.01528)☆23Updated 4 years ago
- Learn NVDLA by SOMNIA☆42Updated 5 years ago