mit-han-lab / bnn-icestickLinks
Binary Neural Network on IceStick FPGA.
☆52Updated 7 years ago
Alternatives and similar repositories for bnn-icestick
Users that are interested in bnn-icestick are comparing it to the libraries listed below
Sorting:
- This is a collection of works on neural networks and neural accelerators.☆41Updated 6 years ago
- Example code and instructions on getting Tensorflow Lite running on a Xilinx Zynq☆49Updated 7 years ago
- ☆39Updated 8 years ago
- Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing☆12Updated 6 years ago
- ☆14Updated 5 years ago
- ☆119Updated 7 years ago
- ☆37Updated 3 years ago
- An implementation of a BinaryConnect network for cifar10☆11Updated 5 years ago
- Ternary Weights and Activations☆24Updated 7 years ago
- A regularly updated comparison of CNN architectures in terms of accuracy, operations and model size☆45Updated 6 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆141Updated 5 years ago
- Keras implementations of BinaryNet and XNORNet☆55Updated 7 years ago
- CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms☆87Updated 11 months ago
- Open Source Compiler Framework using ONNX as Frontend and IR☆33Updated 3 years ago
- BNN implementation in tensorflow☆166Updated 7 years ago
- A hardware implementation of a feed-forward Convolutional Neural Network called XNOR-Net which has faster execution due to the replacemen…☆18Updated 7 years ago
- ☆44Updated 5 years ago
- Jupyter notebook examples on image classification with quantized neural networks☆69Updated 5 years ago
- ☆25Updated 7 years ago
- NEural Minimizer for pytOrch☆45Updated last year
- Quantized Neural Networks - networks trained for inference at arbitrary low precision.☆147Updated 7 years ago
- Implementation for Trained Ternary Network.☆107Updated 8 years ago
- ☆62Updated 7 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Updated 6 years ago
- ☆53Updated 6 years ago
- Fast NPU-aware Neural Architecture Search☆22Updated 4 years ago
- An exploration of log domain "alternative floating point" for hardware ML/AI accelerators.☆395Updated 2 years ago
- Reducing the size of convolutional neural networks☆112Updated 7 years ago
- ☆47Updated 5 years ago
- ☆20Updated 7 years ago