Springbone / CC-CamLinks
CC-Cam: A diffuser camera based on Pynq-Z2
☆20Updated 5 years ago
Alternatives and similar repositories for CC-Cam
Users that are interested in CC-Cam are comparing it to the libraries listed below
Sorting:
- 2019 SEU-Xilinx Summer School☆50Updated 6 years ago
- Pynq computer vision examples with an OV5640 camera☆58Updated 5 years ago
- ☆24Updated 9 years ago
- PYNQ Composabe Overlays☆74Updated last year
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆69Updated last year
- This repo is for Edge Vision SoC framework, which facilitates quick porting of users' design for Edge AI and Vision solutions.☆25Updated 7 months ago
- A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-freque…☆50Updated 6 years ago
- ☆18Updated 7 years ago
- Interface Protocol in Verilog☆51Updated 6 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Updated 3 years ago
- A multi-board Extended Kalman Filter (EKF)☆32Updated 7 years ago
- use Verilog HDL implemente bicubic interpolation in FPGA☆29Updated 6 years ago
- PYNQ学习资料☆174Updated 6 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆76Updated 2 months ago
- Translated SpinalHDL-Doc(v1.7.2) into Chinese☆53Updated 2 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆241Updated 4 years ago
- SDRAM controller with AXI4 interface☆100Updated 6 years ago
- Vitis Model Composer Examples and Tutorials☆115Updated this week
- ☆13Updated 5 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆48Updated 9 years ago
- Bilinear interpolation realizes image scaling based on FPGA☆29Updated 5 years ago
- RTL Verilog library for various DSP modules☆94Updated 3 years ago
- understanding of cocotb (In Chinese Only)☆20Updated 7 months ago
- APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS☆28Updated 2 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆62Updated 3 years ago
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆86Updated 2 years ago
- Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现☆27Updated last year
- Huffman encoding core (Vivado HLS Project)☆12Updated 6 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆33Updated 4 years ago
- FFT generator using Chisel☆63Updated 4 years ago