Implemented The UART with FIFO
☆16Jul 4, 2019Updated 7 years ago
Alternatives and similar repositories for Verilog_Uart_With_Fifo
Users that are interested in Verilog_Uart_With_Fifo are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ESP32-NOW with Wifi☆23Apr 11, 2025Updated last year
- ☆19Dec 19, 2018Updated 7 years ago
- CLASES☆18Sep 23, 2026Updated 3 weeks ago
- ☆14Apr 16, 2019Updated 7 years ago
- Mirror of NeTV FPGA Verilog Code☆14Jan 21, 2012Updated 14 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago
- Present Crypto Engine in Verilog☆12Feb 27, 2016Updated 10 years ago
- Electronic control of microscope elements (camera/laser triggering, TTL, PWM, servos, analog i/o) based on affordable FPGAs, integrated w…☆25Feb 27, 2023Updated 3 years ago
- 在FPGA上实现SRIO收发控制器☆11Sep 30, 2022Updated 4 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 9 years ago
- A 5-stage pipelined, rv32i core with branch prediction and hazard detection☆15Dec 11, 2025Updated 10 months ago
- HDMI + GPU-pipeline + FFT☆15Mar 4, 2016Updated 10 years ago
- 400 nm SiO2 capacitor simulation of interface trap formation with state transitions in Sentaurus TCAD☆17May 26, 2017Updated 9 years ago
- hardware implement of huffman coding(written in verilog)☆15Jul 30, 2017Updated 9 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- This repository includes Robot Vision, Planning, Learning and Modeling course projects☆17Mar 13, 2017Updated 9 years ago
- This repository contains the details of controlling a 3-DOF robotic arm with 4 servo motors using FPGA. The design is execute using the N…☆24May 5, 2022Updated 4 years ago
- 基于FPGA和ov5640的实时图像采集及灰度转换系统☆27Mar 5, 2024Updated 2 years ago
- A custom coprocessor and SoC for hardware security experiments in electronics.☆12May 20, 2017Updated 9 years ago
- SPI通信实现FLASH读写☆17Mar 18, 2020Updated 6 years ago
- Solves inverse kinematics problem for KukaKR210 using neural networks☆21Jul 14, 2017Updated 9 years ago
- A small Deep Learning Image recognition tutorial aimed at people just starting out in their Deep Learning Journey☆12Nov 17, 2018Updated 7 years ago
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- An ASCII Header Generator for Network Protocols☆14Dec 12, 2024Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Documentation for Digital Design course☆21Oct 11, 2026Updated last week
- Arduino library for interfacing with 23K256 and 23LC1024 SRAM chips from Arduino☆17Nov 29, 2013Updated 12 years ago
- Embedded facial recognition system involving PYNQ board, Webcam, and HDMI output.☆11May 10, 2018Updated 8 years ago
- ☆12Feb 9, 2020Updated 6 years ago
- OpenMIPS——《自己动手写CPU》处理器部分☆22Mar 4, 2017Updated 9 years ago
- ☆22Nov 7, 2019Updated 6 years ago
- Hardware Trojan on a Basis 3 FPGA for Hardware and Embedded Systems Security☆11May 1, 2017Updated 9 years ago
- Verilog Code for I2C Protocol☆20Nov 12, 2020Updated 5 years ago
- An Architecture-level Fault Injection Tool for GPU Application Resilience Evaluations☆21Apr 14, 2020Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Virtual Platform for AWS FPGA support☆16Oct 19, 2018Updated 7 years ago
- Bose–Chaudhuri–Hocquenghem Codec☆14Mar 19, 2026Updated 6 months ago
- This is a SPI Master Module Written in Verilog☆14Aug 9, 2018Updated 8 years ago
- ☆19Mar 6, 2020Updated 6 years ago
- Extended and external tests for Verilator testing☆19Oct 6, 2026Updated last week
- An implementation of the decoding of BCH codes resistant to timing attacks☆11Sep 18, 2020Updated 6 years ago
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆14Apr 1, 2020Updated 6 years ago