ReaLLMASIC / nanoGPT
The simplest, fastest repository for training/finetuning medium-sized GPTs.
☆26Updated last week
Alternatives and similar repositories for nanoGPT:
Users that are interested in nanoGPT are comparing it to the libraries listed below
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆246Updated last month
- ☆16Updated 2 weeks ago
- A Fast, Low-Overhead On-chip Network☆186Updated this week
- Curriculum for a university course to teach chip design using open source EDA tools☆62Updated last year
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆98Updated 4 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆164Updated 4 months ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆175Updated 2 weeks ago
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆76Updated 2 months ago
- RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni☆125Updated 7 years ago
- ☆147Updated 3 weeks ago
- Introductory course into static timing analysis (STA).☆90Updated 5 months ago
- A verilog implementation for Network-on-Chip☆72Updated 7 years ago
- IC implementation of Systolic Array for TPU☆221Updated 5 months ago
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆58Updated 11 months ago
- An AXI4 crossbar implementation in SystemVerilog☆141Updated last month
- ☆31Updated 5 years ago
- A caravan equipped with API for creating bus protocols in Chisel with ease.☆14Updated 2 weeks ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆145Updated 9 months ago
- Convolutional accelerator kernel, target ASIC & FPGA☆189Updated last year
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of ORCA which was taped-out by NTI.☆16Updated last year
- ☆136Updated this week
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆152Updated last week
- AIB Generator: Analog hardware compiler for AIB PHY☆33Updated 4 years ago
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆168Updated 5 years ago
- A collection of commonly asked RTL design interview questions☆27Updated 7 years ago
- AXI DMA 32 / 64 bits☆111Updated 10 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆150Updated 5 years ago
- ☆105Updated 4 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆71Updated 2 years ago
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆59Updated last month