RIOSLaboratory / Open3DFlow
An open-source 3D IC design platform that leverages existing open EDA tools while incorporating tailored abstractions and customizations optimized for 3D chiplet designs.
☆20Updated 5 months ago
Alternatives and similar repositories for Open3DFlow:
Users that are interested in Open3DFlow are comparing it to the libraries listed below
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆79Updated 2 months ago
- ☆27Updated 3 years ago
- Dataset for ML-guided Accelerator Design☆36Updated 4 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆44Updated 6 months ago
- The open-sourced version of BOOM-Explorer☆39Updated last year
- The first version of TritonPart☆24Updated last year
- ☆25Updated 11 months ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆31Updated last month
- Collection of digital hardware modules & projects (benchmarks)☆52Updated 4 months ago
- reference block design for the ASAP7nm library in Cadence Innovus☆41Updated 9 months ago
- ☆16Updated 3 years ago
- An integrated CGRA design framework☆87Updated 2 weeks ago
- ☆43Updated 11 months ago
- A list of our chiplet simulaters☆31Updated 3 years ago
- ☆58Updated last year
- ☆26Updated 5 years ago
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆31Updated 2 months ago
- ☆41Updated 6 months ago
- ☆25Updated last year
- ☆38Updated 2 years ago
- CATCH 1.0, Initial full release of CATCH cost model.☆12Updated last month
- A toolchain for rapid design space exploration of chiplet architectures☆45Updated 2 weeks ago
- Template-based Reconfigurable Architecture Modeling Framework☆14Updated 2 years ago
- A free standard cell library for SDDS-NCL circuits☆26Updated 2 years ago
- ☆30Updated 3 years ago
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆33Updated this week
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆101Updated last year
- ☆144Updated 3 weeks ago
- The Verilog source code for DRUM approximate multiplier.☆29Updated last year
- ☆72Updated 10 years ago