Open Programmable Acceleration Engine
☆270Apr 21, 2026Updated last month
Alternatives and similar repositories for opae-sdk
Users that are interested in opae-sdk are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Jan 28, 2025Updated last year
- opae.github.io☆10Sep 2, 2024Updated last year
- OFS Platform Components☆19May 28, 2025Updated last year
- Linux kernel driver for the Device Feature List framework for FPGA devices☆25Feb 6, 2025Updated last year
- Centaur, a framework for hybrid CPU-FPGA databases☆28May 2, 2017Updated 9 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications su…☆16Jun 29, 2019Updated 6 years ago
- OPAE porting to Xilinx FPGA devices.☆40Aug 5, 2020Updated 5 years ago
- ☆21Jan 31, 2026Updated 4 months ago
- Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow☆93Mar 9, 2026Updated 3 months ago
- Virtio front-end and back-end bridge, implemented with FPGA.☆29Sep 16, 2020Updated 5 years ago
- ☆88Jan 7, 2023Updated 3 years ago
- doppioDB - A hardware accelerated database☆51May 2, 2017Updated 9 years ago
- P4-14/16 Bluespec Compiler☆91Apr 4, 2026Updated 2 months ago
- Virtio implementation in SystemVerilog☆49Jan 23, 2018Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)☆930Apr 15, 2026Updated last month
- ☆22Jul 28, 2016Updated 9 years ago
- An FPGA-based NetTLP adapter☆29Mar 10, 2020Updated 6 years ago
- ☆15Jul 28, 2016Updated 9 years ago
- Open source FPGA-based NIC and platform for in-network compute☆2,358Jul 5, 2024Updated last year
- SDAccel Examples☆360May 20, 2022Updated 4 years ago
- ☆36Jan 21, 2021Updated 5 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Mar 4, 2023Updated 3 years ago
- ☆10Nov 8, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- Official repository of the AWS EC2 FPGA Hardware and Software Development Kit☆1,665May 19, 2026Updated 3 weeks ago
- Connectal is a framework for software-driven hardware development.☆178Oct 16, 2023Updated 2 years ago
- ChipScope / ILA using XVC (XIlinx Virtual Cable Over PCIe) with a PR (Partial Reconfiguration) design Example.☆15Jun 1, 2017Updated 9 years ago
- ☆18Jul 3, 2025Updated 11 months ago
- AFU framework for streaming applications with CAPI.☆13Mar 5, 2018Updated 8 years ago
- Networking Template Library for Vivado HLS☆29Jul 12, 2020Updated 5 years ago
- HLS implementation of cuckoo hashing. Refer to paper : https://ieeexplore.ieee.org/document/7577355/☆14Dec 4, 2018Updated 7 years ago
- Run Time for AIE and FPGA based platforms☆665Updated this week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A heterogeneous Apache Spark framework.☆19Mar 2, 2017Updated 9 years ago
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆23Oct 9, 2020Updated 5 years ago
- Angstrom repository with updated layers file☆11Jul 9, 2021Updated 4 years ago
- A Just-In-Time Compiler for Verilog from VMware Research☆448Jul 1, 2021Updated 4 years ago
- Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…☆18Aug 28, 2019Updated 6 years ago
- CAPI SNAP Framework Hardware and Software☆111May 4, 2021Updated 5 years ago
- implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture☆109Jun 23, 2018Updated 7 years ago