MIPSfpga / mipsfpga-plusLinks
MIPSfpga+ allows loading programs via UART and has a switchable clock
☆108Updated 5 years ago
Alternatives and similar repositories for mipsfpga-plus
Users that are interested in mipsfpga-plus are comparing it to the libraries listed below
Sorting:
- Verilog wishbone components☆115Updated last year
- Core description files for FuseSoC☆124Updated 4 years ago
- Generates Makefiles to synthesize, place, and route verilog using Vivado☆96Updated 3 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆82Updated 2 years ago
- FuseSoC standard core library☆139Updated last week
- Ethernet MAC 10/100 Mbps☆82Updated 5 years ago
- Yet Another RISC-V Implementation☆93Updated 8 months ago
- Eclipse based IDE for RISC-V bare metal software development.☆18Updated 5 years ago
- Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog☆81Updated 5 years ago
- WISHBONE SD Card Controller IP Core☆122Updated 2 years ago
- open-source SDKs for the SCR1 core☆74Updated 6 months ago
- ☆85Updated 8 years ago
- TCP/IP controlled VPI JTAG Interface.☆65Updated 4 months ago
- The OpenRISC 1000 architectural simulator☆74Updated last month
- A single-wire bi-directional chip-to-chip interface for FPGAs☆121Updated 8 years ago
- Multi-Technology RAM with AHB3Lite interface☆23Updated last year
- Verilog (SystemVerilog) coding style☆42Updated 6 years ago
- A 32-bit Microcontroller featuring a RISC-V core☆152Updated 7 years ago
- ☆63Updated 6 years ago
- Verilog implementation of a RISC-V core☆117Updated 6 years ago
- The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.☆63Updated 7 years ago
- A 32-bit RISC-V processor for mriscv project☆58Updated 7 years ago
- I2C controller core☆43Updated 2 years ago
- An Open Source configuration of the Arty platform☆130Updated last year
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆33Updated 8 years ago
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 5 years ago
- SoftCPU/SoC engine-V☆54Updated 2 months ago
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆85Updated 4 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆69Updated 3 years ago
- LatticeMico32 soft processor☆106Updated 10 years ago