RL_PCB is a novel learning-based method for optimising the placement of circuit components on a Printed Circuit Board (PCB).
☆53Jun 18, 2024Updated last year
Alternatives and similar repositories for RL_PCB
Users that are interested in RL_PCB are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆14Oct 25, 2023Updated 2 years ago
- ☆25Aug 11, 2020Updated 5 years ago
- ☆18Jun 17, 2020Updated 5 years ago
- ☆24Dec 1, 2025Updated 3 months ago
- Official implementation of NeurIPS'23 paper "Macro Placement by Wire-Mask-Guided Black-Box Optimization"☆31May 23, 2025Updated 10 months ago
- [NeurIPS 2022 Spotlight] MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learning☆68Jan 5, 2026Updated 2 months ago
- LLM-Enhanced Bayesian Optimization for Efficient Analog Constraint Generation☆30Oct 28, 2024Updated last year
- ☆37Mar 3, 2026Updated 2 weeks ago
- ☆35Jul 23, 2020Updated 5 years ago
- Layout Symmetry Annotation for Analog Circuits with GraphNeural Networks☆16Apr 7, 2023Updated 2 years ago
- Analog and mixed-signal automatic placer☆13Feb 14, 2023Updated 3 years ago
- This is the code for our paper "Reinforcement Learning within Tree Search for Fast Macro Placement".☆35Nov 13, 2024Updated last year
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆53Nov 4, 2024Updated last year
- Auto place components into pcbnew from a centroid file. Useful for maintaining a common board form factor.☆33Jul 9, 2025Updated 8 months ago
- ☆18May 23, 2021Updated 4 years ago
- Analog Placement Quality Prediction☆25Mar 24, 2023Updated 2 years ago
- This is a deep-learning based model for Electronic Design Automation(EDA), predicting the IR drop location on the chip.☆34Aug 4, 2023Updated 2 years ago
- 🤖 Intelligent AI-powered PCB design automation tool using machine learning for component placement, routing optimization, and signal int…☆35Aug 15, 2025Updated 7 months ago
- A collection of design automation algorithms, methodologies, and tools for electronics/photonics, and emerging eda technologies☆20Apr 1, 2023Updated 2 years ago
- EDIF netlist checker tool☆27Oct 24, 2022Updated 3 years ago
- C++ implementation for Sequence Pair fixed-outline chip floorplanner☆11Dec 27, 2022Updated 3 years ago
- ☆29Jun 23, 2023Updated 2 years ago
- [NeurIPS 2023] CircuitFormer: Circuit as Set of Points☆38Nov 22, 2023Updated 2 years ago
- iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.☆11Mar 4, 2023Updated 3 years ago
- Implementations of DeepPlace, PRNet, HubRouter, PreRoutGNN, FlexPlanner and DSBRouter.☆298Nov 23, 2025Updated 4 months ago
- Selected problems and their solutions from the book on "Machine Intelligence in Design Automation"☆27Dec 9, 2018Updated 7 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- Comparative Analysis of Graph Neural Networks for Node Regression task on Wiki-Squirrel dataset (Bachelor's Research Project)☆12Nov 6, 2025Updated 4 months ago
- Senior Design☆12Jan 26, 2025Updated last year
- ☆17Jul 2, 2024Updated last year
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- RISC-V-5 stage pipelined in verilog☆10Jul 24, 2020Updated 5 years ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Aug 19, 2024Updated last year
- ☆10Mar 28, 2025Updated 11 months ago
- ☆52Jun 29, 2024Updated last year
- Deep learning toolkit-enabled VLSI placement☆961Feb 19, 2026Updated last month
- Export yolov5 model to run on cpu using tflite☆14Aug 12, 2021Updated 4 years ago
- [ICML 2023] ChiPFormer: Transferable Chip Placement via Offline Decision Transformer☆54Feb 22, 2026Updated last month
- Spiking Neural Network Accelerator☆15May 18, 2022Updated 3 years ago