C++ implementation for Sequence Pair fixed-outline chip floorplanner
☆11Dec 27, 2022Updated 3 years ago
Alternatives and similar repositories for Sequence-Pair-Floorplanner
Users that are interested in Sequence-Pair-Floorplanner are comparing it to the libraries listed below
Sorting:
- ☆10Dec 11, 2022Updated 3 years ago
- Corblivar is a simulated-annealing-based floorplanning suite for 3D ICs☆34Jun 1, 2024Updated last year
- NCTU 2018 Spring Integrated Circuit Design Laboratory☆25Jun 25, 2018Updated 7 years ago
- A solver to find a solution of the 2D rectangle packing problem by simulated annealing (SA) optimization.☆107Feb 12, 2022Updated 4 years ago
- API Connect Operations CLI☆12Dec 19, 2025Updated 2 months ago
- This repository integrates gem5 with Ramulator2, allowing gem5 to use Ramulator2 as its DRAM memory model. With the provided materials an…☆13Jun 7, 2025Updated 9 months ago
- A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.☆11Aug 22, 2021Updated 4 years ago
- C++ implementation for Fiduccia-Mattheyses Heuristic☆10Jan 9, 2023Updated 3 years ago
- ☆12Jan 19, 2020Updated 6 years ago
- Parallel Simulated annealing in GPU using CUDA (used for floorplanning problem)☆12Jun 4, 2020Updated 5 years ago
- Course project in Principles of Computer Operating Systems☆13Dec 1, 2015Updated 10 years ago
- Complete Git Guide: Understand and Master Git and GitHub, by Packt Publishing☆20Feb 22, 2024Updated 2 years ago
- Memory Compiler Tutorial☆14Oct 7, 2020Updated 5 years ago
- Project of OOP, Tsinghua University, 2018 spring; Implement of "VLSI Module Placement Based on Rectangle Packing by the Sequence-Pair"☆13Jun 30, 2019Updated 6 years ago
- Educational linear algebra algorithms☆11Feb 20, 2021Updated 5 years ago
- AI 应用服务平台☆30Nov 12, 2025Updated 3 months ago
- ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms☆52Sep 22, 2025Updated 5 months ago
- The implementation of FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design (NeurIPS 2025)☆34Nov 19, 2025Updated 3 months ago
- Using Doxygen to Document C++ Libraries☆11Aug 4, 2020Updated 5 years ago
- erlang docset by Dash☆15Jul 24, 2012Updated 13 years ago
- A new DRAM substrate that mitigates the excessive energy consumption from both (i) transmitting unused data on the memory channel and (i…☆13Aug 23, 2024Updated last year
- ☆17Feb 24, 2025Updated last year
- Source code of the processing-in-memory simulator used in the GRIM-Filter paper published at BMC Genomics in 2018: "GRIM-Filter: Fast See…☆11Feb 5, 2018Updated 8 years ago
- ☆15Jun 30, 2024Updated last year
- Specification of the Pug AST☆10Jul 21, 2016Updated 9 years ago
- Data Structure and Algorithm with C (2021 Spring)☆11Jan 22, 2026Updated last month
- ☆10Dec 4, 2018Updated 7 years ago
- This library contains rectilinear spanning graph construction, finding minimum spanning tree and an implementation of binary search tree☆10Aug 22, 2015Updated 10 years ago
- ☆12Apr 16, 2022Updated 3 years ago
- A simple header library of basic C++ graph classes☆10Feb 12, 2020Updated 6 years ago
- This project is made to generate Polar decoders (unrolled decoders).☆15May 31, 2025Updated 9 months ago
- ☆14Oct 25, 2023Updated 2 years ago
- VTK based C++ graphics library for plotting and for data on rectilinear and unstructured grids with an flexible and easy to use API.☆12Sep 5, 2020Updated 5 years ago
- ☆14Dec 18, 2022Updated 3 years ago
- A hardware accelerator for General Matrix Multiply, developed in SystemC using ESP.☆16May 26, 2021Updated 4 years ago
- Build Output Colorizer extension for VSCode☆16Dec 29, 2024Updated last year
- My solutions to problems in the 'UVA toolkit'.☆12Jul 18, 2011Updated 14 years ago
- A simple PyTorch implementations of `Badnets: Identifying vulnerabilities in the machine learning model supply chain` on MNIST and CIFAR1…☆10May 19, 2021Updated 4 years ago
- Scalable In-Memory Acceleration With Mesh: Device, Circuits, Architecture, and Algorithm☆16Oct 11, 2020Updated 5 years ago