Alternatives and similar repositories for netlist-checker:

Users that are interested in netlist-checker are comparing it to the libraries listed below

• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆42Updated 3 months ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆59Updated last year
• yrrapt / caravel_amsat_txrx_ic
  ☆30Updated 4 years ago
• VLSI-EDA / PoC-Examples
  This repository contains synthesizable examples which use the PoC-Library.
  ☆37Updated 4 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆37Updated 5 years ago
• ObKo / USBCore
  USB Full-Speed/Hi-Speed Device Controller core for FPGA
  ☆32Updated 4 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆44Updated 4 years ago
• Digilent / Arty-A7-35-XADC
  ☆19Updated 4 years ago
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated last year
• magro732 / OpenRIO
  Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
  ☆33Updated 7 years ago
• Cognoscan / BoostDSP
  VHDL Library for implementing common DSP functionality.
  ☆27Updated 6 years ago
• torc-isi / torc
  Torc: Tools for Open Reconfigurable Computing
  ☆38Updated 8 years ago
• stnolting / fpga_torture
  🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
  ☆29Updated 2 years ago
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆21Updated last year
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆17Updated 4 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆87Updated 7 months ago
• bavovanachte / sphinx-wavedrom
  A sphinx extension that allows including wavedrom diagrams by using its text-based representation
  ☆36Updated 7 months ago
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆28Updated 4 years ago
• litaotju / edif-parser
  A c project for EDIF format parse.
  ☆13Updated 8 years ago
• mattvenn / magic-inverter
  an inverter drawn in magic with makefile to simulate
  ☆26Updated 2 years ago
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆68Updated 3 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆84Updated last year
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• openXC7 / xc7k325t-blinky-nextpnr
  ☆45Updated 2 years ago
• HarmonInstruments / verilog
  ☆20Updated 2 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆39Updated 2 months ago
• hdl / symbolator
  Generate symbols from HDL components/modules
  ☆21Updated 2 years ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆42Updated last year