This script generates and analyzes prefix tree adders.
☆38Apr 9, 2021Updated 5 years ago
Alternatives and similar repositories for AdderCircuitGenerator
Users that are interested in AdderCircuitGenerator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Booth encoded Wallace tree multiplier☆17May 24, 2018Updated 8 years ago
- Compare intel and kunpeng cpus, helping people know about Kunpeng, the ARM64 chip.☆14Nov 23, 2020Updated 5 years ago
- A stand-alone Android app from Tensorflow TF detect with Yolo V2 coco☆18Feb 28, 2018Updated 8 years ago
- Montgomery multiply☆12Mar 21, 2015Updated 11 years ago
- Linux下使用Grafana+InfluxDB+MongoDB实现爬虫可视化动态监控☆17Dec 1, 2018Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 32 Bit RippleCarry, CarrySkip, CarrySelect, CarryIncrement, Sklansky, Brent-Kung, Kogge-Stone and CarryLookahead adders with their intern…☆27May 1, 2018Updated 8 years ago
- An optimized C implementation of the RSA public key encryption using the Montgomery Multiplication algorithm☆19Jan 16, 2020Updated 6 years ago
- ☆16May 11, 2018Updated 8 years ago
- BTOR2 MLIR project☆26Jan 17, 2024Updated 2 years ago
- 个人博客管理系统(Spring4+Springmvc4+MyBatis3+Bootstrap+EasyUI+oracle) 使用Maven3+Spring4+Springmvc+Mybatis3架构；数据库使用oracle，数据库连接池使用阿里巴巴的Druid； 使用Bo…☆28Jan 11, 2017Updated 9 years ago
- 32-bit soft RISCV processor for FPGA applications☆20Nov 25, 2023Updated 2 years ago
- ☆35Apr 3, 2020Updated 6 years ago
- MATLAB repository of characteristic functions☆12Jan 17, 2025Updated last year
- Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.☆44Jun 6, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Repository for VSD-IAT Workshop: Physical Verification using SKY130☆10Aug 15, 2021Updated 5 years ago
- Privacy-Preserving Data Analysis using Pandas☆24Oct 16, 2021Updated 4 years ago
- Camkit是一个摄像头相关的工具箱，使用C语言写成，包含了从：图像采集-->色彩转换-->H264编码-->RTP打包-->网络发送的全套接口。☆50Jan 22, 2017Updated 9 years ago
- A 4x4 Weight Stationary Systolic Array Implementation☆15Oct 16, 2023Updated 2 years ago
- A survey of manufacturer-provided DRAM operating parameters and timings as specified by DRAM chip datasheets from between 1970 and 2021. …☆11May 4, 2022Updated 4 years ago
- 少女前线手游 模拟器Python脚本（python3.6 windows）☆18Nov 15, 2018Updated 7 years ago
- ☆12Sep 29, 2021Updated 4 years ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆17Dec 8, 2020Updated 5 years ago
- Gate-Level Simulation on a GPU☆10Nov 22, 2016Updated 9 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Approximate layers - TensorFlow extension☆27Apr 14, 2025Updated last year
- Wallace and Dadda tree multiplier generator in vhdl and verilog☆14Mar 14, 2026Updated 5 months ago
- The ANUBIS benchmark suite for Incremental Synthesis☆12Dec 15, 2020Updated 5 years ago
- DATC Robust Design Flow.☆36Jan 21, 2020Updated 6 years ago
- This repository contains the design files of RISC-V Pipeline Core☆75May 11, 2023Updated 3 years ago
- Prefix tree adder space exploration library☆57Jan 27, 2026Updated 7 months ago
- 32 bit pipelined binary floating point adder using IEEE-754 Single Precision Format in Verilog☆18Aug 27, 2020Updated 6 years ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆33Nov 13, 2023Updated 2 years ago
- A GPU acceleration flow for RTL simulation with batch stimulus☆123Apr 1, 2024Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A tool for cross-checking Verilog compilers☆15Apr 16, 2025Updated last year
- Co-processor for whole genome alignment☆13Jun 6, 2020Updated 6 years ago
- 💻NUAA 2018 操作系统实践 - 上机题目☆18Jul 2, 2018Updated 8 years ago
- A collection of big designs to run post-synthesis simulations with yosys☆51Oct 27, 2015Updated 10 years ago
- ☆15Dec 9, 2025Updated 8 months ago
- DATuner Repository☆17Sep 9, 2018Updated 7 years ago
- ECE 5745 Tutorial 8: SRAM Generators☆19Mar 5, 2022Updated 4 years ago