An rv32i inspired ISA, SIMT GPU implementation in system-verilog.
☆258Feb 11, 2025Updated last year
Alternatives and similar repositories for smol-gpu
Users that are interested in smol-gpu are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Chisel verison of the tiny-gpu project, with more verification codes than original implementation☆14Jan 22, 2025Updated last year
- Single Instruction Multiple Threads GPU Core with textbook Streaming Multi-Processor features☆75Jan 30, 2026Updated 9 months ago
- Theia: ray graphic processing unit☆22Jul 17, 2014Updated 12 years ago
- A simple risc-v CPU /GPU running on an Arty A7-100T FPGA board☆35Jun 30, 2021Updated 5 years ago
- ☆2,364Updated this week
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- PSOC SoC code with peripherals and synthesis scripts for FPGA/ASIC☆12Oct 8, 2025Updated last year
- A simple superscalar out-of-order RISC-V microprocessor☆257Feb 24, 2025Updated last year
- OpenSource GPU, in Verilog, loosely based on RISC-V ISA☆1,401Nov 22, 2024Updated last year
- contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols☆68Updated this week
- A 32-bit RISC-V Emulator in Rust☆10Feb 4, 2022Updated 4 years ago
- HomebrewGPU is a simple ray tracing GPU built on FPGA, featuring basic ray–primitive intersection, BVH traversal, shadowing, reflection, …☆230Jul 31, 2023Updated 3 years ago
- Silicon-proven INT8 systolic NPU (8×8 MAC array) taped out on SkyWater 130nm via LibreLane. Features a custom 32-bit ISA, UART–APB host i…☆20May 24, 2026Updated 5 months ago
- SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations☆22Apr 12, 2026Updated 6 months ago
- A minimal GPU design in Verilog to learn how GPUs work from the ground up☆13,159Aug 18, 2024Updated 2 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Typhoon GPU on FPGA☆13Aug 22, 2019Updated 7 years ago
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆294Updated this week
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆29Updated this week
- An open source GPU based off of the AMD Southern Islands ISA.☆1,431Aug 18, 2025Updated last year
- 3-wide superscalar, out-of-order RISC-V processor (RV32IM subset) in System Verilog, demonstrating key Instruction-Level Parallelism☆32Aug 15, 2025Updated last year
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆26Updated this week
- The multi-core cluster of a PULP system.☆123Updated this week
- RISCV core RV32I/E.4 threads in a ring architecture☆34Jun 12, 2023Updated 3 years ago
- Design and UVM-TB of RISC -V Microprocessor☆36Jun 27, 2024Updated 2 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- DUTH RISC-V Superscalar Microprocessor☆35Oct 23, 2024Updated 2 years ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆970Updated this week
- Vortex Graphics☆101Oct 2, 2024Updated 2 years ago
- Benchmark suite for real-time behavior, including interrupt latency and context switching times☆15Oct 20, 2021Updated 5 years ago
- A synthesizable, five-stage, pipelined 32-bit RISC-V processor (implements the RV32I base ISA)☆15Apr 18, 2024Updated 2 years ago
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆179Updated this week
- Design a Low-cost-AI-Accelerator based on Google's Tensor Processing Unit Version 1 in TSMC 16nm☆23Sep 27, 2026Updated last month
- Collaborative project to create an advanced GPU, with additional features to flesh-out the peripherals for a home-made, DIY computer.☆18Feb 26, 2023Updated 3 years ago
- RTL implementation of a ray-tracing GPU☆17Dec 18, 2012Updated 13 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Tranining Completion Project : : Verification of AXI Direct Memory Access (DMA) using UVM☆52Jul 11, 2025Updated last year
- 10 Gigabit Ethernet MAC Core UVM Verification☆19Oct 5, 2023Updated 3 years ago
- Hardware acceleration for transformer attention mechanisms on NVIDIA Deep Learning Accelerator (NVDLA), enabling efficient inference of…☆20Mar 30, 2025Updated last year
- Capture retired instructions of a RISC-V Core and compress them to a sequence of packets.☆19Mar 13, 2024Updated 2 years ago
- GPGPU microprocessor architecture☆2,232Updated this week
- Gem5 with PCI Express integrated.☆26Sep 29, 2018Updated 8 years ago
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,214Updated this week