ecilasun / tinysys
A tiny system built on a small QMTECH board
☆106Updated last month
Alternatives and similar repositories for tinysys
Users that are interested in tinysys are comparing it to the libraries listed below
Sorting:
- Design digital circuits in C. Simulate really fast with a regular compiler.☆173Updated 2 years ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆168Updated last year
- Fabric generator and CAD tools☆182Updated this week
- Example LED blinking project for your FPGA dev board of choice☆175Updated 2 months ago
- A pipelined RISC-V processor☆55Updated last year
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆135Updated last month
- Design implementation of the RV32I Core in Verilog HDL with Zicsr extension☆88Updated last year
- Naive Educational RISC V processor☆83Updated 7 months ago
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆279Updated 3 weeks ago
- Basic RISC-V CPU implementation in VHDL.☆167Updated 4 years ago
- Minimax: a Compressed-First, Microcoded RISC-V CPU☆214Updated last year
- CoreScore☆151Updated 3 months ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆104Updated 9 months ago
- Linux capable RISC-V SoC designed to be readable and useful.☆144Updated this week
- Opensource DDR3 Controller☆323Updated this week
- Example designs showing different ways to use F4PGA toolchains.☆275Updated last year
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆285Updated 2 months ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆91Updated 8 months ago
- 3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.☆79Updated 4 years ago
- Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)☆36Updated 3 years ago
- Graphics demos☆110Updated last year
- HaDes-V is an Open Educational Resource for learning microcontroller design. It guides you through creating a pipelined 32-bit RISC-V pro…☆48Updated 3 months ago
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆428Updated 8 months ago
- Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation☆267Updated last year
- 📦 Prebuilt RISC-V GCC toolchains for x64 Linux.☆102Updated 2 months ago
- FOSS Flow For FPGA☆386Updated 4 months ago
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆152Updated last week
- Verilog implementation of multi-stage 32-bit RISC-V processor☆104Updated 4 years ago
- SoC based on VexRiscv and ICE40 UP5K☆158Updated 2 months ago
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆58Updated 6 months ago