Gabalo / RO_PUFLinks
Ring Oscillator Physically Unclonable Funtion
☆25Updated 4 years ago
Alternatives and similar repositories for RO_PUF
Users that are interested in RO_PUF are comparing it to the libraries listed below
Sorting:
- FPGA implementation of a physical unclonable function for authentication☆33Updated 8 years ago
- An FPGA Implementation of Arbiter PUF with 4x4 Switch Blocks☆15Updated 4 years ago
- A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators☆23Updated 7 years ago
- ☆20Updated 2 years ago
- FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.☆15Updated 7 years ago
- An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.☆17Updated 5 years ago
- Implementation of ECC on FPGA-Zynq7000 SoC☆19Updated 6 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆10Updated 5 years ago
- a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier☆23Updated 3 years ago
- Repository to store all design and testbench files for Senior Design☆19Updated 5 years ago
- Asynchronous FIFO for transferring data between two asynchronous clock domains☆18Updated 9 years ago
- few python scripts to clone all IP cores from opencores.org☆24Updated last year
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆40Updated 5 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆11Updated 5 months ago
- True Random Number Generator core implemented in Verilog.☆76Updated 4 years ago
- 👌 This linter plugin for SublimeLinter provides an interface to Verilator (Verilog Simulator)☆16Updated last year
- Verilog Implementation of modular exponentiation using Montgomery multiplication☆34Updated 10 years ago
- Basic RISC-V Test SoC☆144Updated 6 years ago
- Elgamal's over Elliptic Curves☆19Updated 6 years ago
- A demo system for Ibex including debug support and some peripherals☆76Updated 3 months ago
- opensource crypto IP core☆28Updated 4 years ago
- Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrate…☆48Updated 10 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆49Updated 4 years ago
- A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆16Updated 2 years ago
- FPGA implementation of Chinese SM4 encryption algorithm.☆56Updated 7 years ago
- This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…☆31Updated 6 years ago
- Verilog based BCH encoder/decoder☆124Updated 2 years ago
- Various RTL design blocks along with verification testbenches with SVAs. Designed using SystemVerilog☆25Updated 3 years ago
- ☆94Updated last month
- Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)☆22Updated 7 years ago