Alternatives and similar repositories for PUF-lab

Users that are interested in PUF-lab are comparing it to the libraries listed below

• siamumar / BIST_PUF_TRNG
  A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators
  ☆23Updated 7 years ago
• scluconn / DA_PUF_Library
  Defense/Attack PUF Library (DA PUF Library)
  ☆50Updated 5 years ago
• ecelab-org / Split-Chip_authentication
  An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.
  ☆17Updated 5 years ago
• crypt-xie / XCryptCore
  Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)
  ☆39Updated 5 years ago
• Crimsonninja / senior_design_puf
  Repository to store all design and testbench files for Senior Design
  ☆19Updated 5 years ago
• Gabalo / RO_PUF
  Ring Oscillator Physically Unclonable Funtion
  ☆24Updated 3 years ago
• secworks / trng
  True Random Number Generator core implemented in Verilog.
  ☆75Updated 4 years ago
• IFM-Ulm / ro-pr-fw
  Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs
  ☆11Updated 5 years ago
• ljhsiun2 / EllipticCurves_SystemVerilog
  Elgamal's over Elliptic Curves
  ☆19Updated 6 years ago
• canaknesil / 4x4-apuf
  An FPGA Implementation of Arbiter PUF with 4x4 Switch Blocks
  ☆15Updated 4 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆34Updated 10 years ago
• nolancon / AES128
  C++ and Verilog to implement AES128
  ☆22Updated 7 years ago
• heerambavi1998 / RSAonVerilog
  Implementation of RSA algorithm on FPGA using Verilog
  ☆28Updated 7 years ago
• mematrix / AES-FPGA
  AES加密解密算法的Verilog实现
  ☆67Updated 9 years ago
• ATaylorCEngFIET / introduction_to_vivado
  ☆20Updated 2 years ago
• scluconn / LPN-based_PUF
  FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.
  ☆15Updated 7 years ago
• kgpai94 / ECC-Encryption-System
  This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…
  ☆31Updated 6 years ago
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆10Updated 5 years ago
• PrincetonUniversity / AutoSVA
  AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…
  ☆87Updated last year
• Fraunhofer-IMS / airisc_core_complex
  Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
  ☆98Updated last month
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆18Updated 6 years ago
• momalab / CoPHEE
  CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.
  ☆32Updated last year
• stnolting / fpga_puf
  Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
  ☆134Updated 2 years ago
• hadipourh / CryptoHDL
  A list of VHDL codes implementing cryptographic algorithms
  ☆27Updated 3 years ago
• lowRISC / ibex-demo-system
  A demo system for Ibex including debug support and some peripherals
  ☆73Updated last month
• sheldonucr / ee260_lab
  EE 260 Winter 2017: Advanced VLSI Design
  ☆65Updated 8 years ago
• zdszx / Modexpowering3
  a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
  ☆22Updated 3 years ago
• mongrelgem / Verilog-Adders
  Implementing Different Adder Structures in Verilog
  ☆71Updated 5 years ago
• isec-tugraz / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆22Updated 10 months ago
• raymondrc / FPGA_SM4
  FPGA implementation of Chinese SM4 encryption algorithm.
  ☆55Updated 7 years ago