scluconn / DA_PUF_LibraryLinks
Defense/Attack PUF Library (DA PUF Library)
☆55Updated 5 years ago
Alternatives and similar repositories for DA_PUF_Library
Users that are interested in DA_PUF_Library are comparing it to the libraries listed below
Sorting:
- FPGA implementation of a physical unclonable function for authentication☆33Updated 8 years ago
- Cryptanalysis of Physically Unclonable Functions☆91Updated last year
- CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.☆36Updated last year
- A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators☆24Updated 8 years ago
- FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.☆15Updated 8 years ago
- Repository to store all design and testbench files for Senior Design☆22Updated 5 years ago
- CocoAlma is an execution-aware tool for formal verification of masked implementations☆24Updated last year
- Hardware implementation of ORAM☆24Updated 8 years ago
- A list of VHDL codes implementing cryptographic algorithms☆27Updated 4 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆12Updated 6 years ago
- FIPS 202 compliant SHA-3 core in Verilog☆23Updated 5 years ago
- This script generates and analyzes prefix tree adders.☆39Updated 4 years ago
- SCARV: a side-channel hardened RISC-V platform☆22Updated 4 years ago
- Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元☆19Updated 3 years ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆98Updated last year
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆12Updated 5 years ago
- ☆21Updated last year
- ☆82Updated last year
- Post-Quantum Cryptography IP Core (Crystals-Dilithium)☆43Updated this week
- Hardware Design of Ascon☆35Updated this week
- Java library for parsing and manipulating graph representations of gate-level Verilog netlists☆15Updated 9 years ago
- VexRiscv reference platforms for the pqriscv project☆16Updated last year
- FPGA related files for ORAM☆14Updated 10 years ago
- Side-channel analysis setup for OpenTitan☆37Updated 2 months ago
- SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. T…☆143Updated 2 years ago
- The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freel…☆67Updated 3 years ago
- ☆25Updated 4 years ago
- ☆13Updated 10 years ago
- The SpinalHDL design of the Proteus core, an extensible RISC-V core.☆61Updated 2 weeks ago
- RISC-V instruction set extensions for SM4 block cipher☆21Updated 5 years ago