zdszx / Modexpowering3
a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
☆16Updated 2 years ago
Related projects ⓘ
Alternatives and complementary repositories for Modexpowering3
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆10Updated 4 years ago
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆35Updated 4 years ago
- FPGA implementation of Chinese SM4 encryption algorithm.☆45Updated 6 years ago
- SDRAM controller with AXI4 interface☆78Updated 5 years ago
- Implementation of ECC on FPGA-Zynq7000 SoC☆17Updated 5 years ago
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆68Updated 6 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆44Updated 3 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆9Updated 10 months ago
- Generic FIFO implementation with optional FWFT☆54Updated 4 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆54Updated 10 months ago
- Hardware Implementation of Advanced Encryption Standard Algorithm in Verilog☆36Updated 7 years ago
- System Verilog and Emulation. Written all the five channels.☆32Updated 7 years ago
- Description of Chinese SM3 Hash algorithm with Verilog HDL☆45Updated 6 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆57Updated 3 weeks ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆47Updated 4 months ago
- Implementing Different Adder Structures in Verilog☆61Updated 5 years ago
- AXI4 BFM in Verilog☆32Updated 7 years ago
- This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…☆29Updated 6 years ago
- Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrate…☆39Updated 9 years ago
- AHB DMA 32 / 64 bits☆50Updated 10 years ago
- Verilog Content Addressable Memory Module☆101Updated 2 years ago
- A verilog implementation for Network-on-Chip☆66Updated 6 years ago
- AXI4 and AXI4-Lite interface definitions☆83Updated 4 years ago
- round robin arbiter☆66Updated 10 years ago
- General Purpose AXI Direct Memory Access☆44Updated 5 months ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆40Updated 3 years ago
- Various RTL design blocks along with verification testbenches with SVAs. Designed using SystemVerilog☆23Updated 2 years ago
- IP operations in verilog (simulation and implementation on ice40)☆52Updated 5 years ago
- True Random Number Generator core implemented in Verilog.☆72Updated 4 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆58Updated 4 years ago