sangwoojun / bluespecpcieLinks
PCIe library for the Xilinx 7 series FPGAs in the Bluespec language
☆82Updated 3 years ago
Alternatives and similar repositories for bluespecpcie
Users that are interested in bluespecpcie are comparing it to the libraries listed below
Sorting:
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆114Updated 2 years ago
- Distributed Accelerator OS☆63Updated 3 years ago
- pcie-bench code for NetFPGA/VCU709 cards☆43Updated 7 years ago
- Connectal is a framework for software-driven hardware development.☆176Updated 2 years ago
- Antmicro's fast, vendor-neutral DMA IP in Chisel☆128Updated 8 months ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆52Updated 4 years ago
- The Task Parallel System Composer (TaPaSCo)☆116Updated 3 weeks ago
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆134Updated 4 years ago
- Verilog Content Addressable Memory Module☆114Updated 3 years ago
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆64Updated 2 years ago
- PCI Express controller model☆71Updated 3 years ago
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆73Updated last year
- This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.☆88Updated last year
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆127Updated 3 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Updated 4 years ago
- AMD OpenNIC driver includes the Linux kernel driver☆71Updated last year
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆88Updated 4 years ago
- OmniXtend cache coherence protocol☆82Updated 7 months ago
- CAPI SNAP Framework Hardware and Software☆110Updated 4 years ago
- Ethernet switch implementation written in Verilog☆57Updated 2 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆127Updated last year
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆46Updated 2 years ago
- A SystemC productivity library: https://minres.github.io/SystemC-Components/☆127Updated this week
- ☆82Updated last year
- QEMU libsystemctlm-soc co-simulation demos.☆160Updated 7 months ago
- Open Application-Specific Instruction Set processor tools (OpenASIP)☆171Updated 2 weeks ago
- contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols☆63Updated this week
- OPAE porting to Xilinx FPGA devices.☆39Updated 5 years ago
- A GPU acceleration flow for RTL simulation with batch stimulus☆116Updated last year
- ☆88Updated 3 years ago