DHLS (Dynamic High-Level Synthesis) compiler based on MLIR
☆171Mar 17, 2026Updated this week
Alternatives and similar repositories for dynamatic
Users that are interested in dynamatic are comparing it to the libraries listed below
Sorting:
- ☆87Mar 5, 2024Updated 2 years ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆54Jul 17, 2023Updated 2 years ago
- ☆17Nov 18, 2025Updated 4 months ago
- Using e-graphs for logic synthesis (ICCAD'25)☆33Updated this week
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆127Jun 11, 2024Updated last year
- Verilog AST☆20Dec 2, 2023Updated 2 years ago
- A tool to generate optimized hardware files for univariate functions.☆29Apr 5, 2024Updated last year
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆61Aug 1, 2025Updated 7 months ago
- ☆62Mar 24, 2025Updated 11 months ago
- A hardware synthesis framework with multi-level paradigm☆44Jan 10, 2025Updated last year
- ☆17Mar 26, 2025Updated 11 months ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆42Jul 17, 2024Updated last year
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- MLIR+EqSat☆26Jan 10, 2026Updated 2 months ago
- A scalable High-Level Synthesis framework on MLIR☆291May 15, 2024Updated last year
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- Open-source AI acceleration on FPGA: from ONNX to RTL☆49Updated this week
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆36Jan 16, 2025Updated last year
- Fearless hardware design☆198Aug 20, 2025Updated 7 months ago
- Allo Accelerator Design and Programming Framework (PLDI'24)☆361Mar 13, 2026Updated last week
- ☆41Oct 10, 2025Updated 5 months ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆28Dec 23, 2025Updated 2 months ago
- egraph <-> json☆16Dec 29, 2025Updated 2 months ago
- ☆23Mar 5, 2026Updated 2 weeks ago
- C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!☆606Jun 19, 2025Updated 9 months ago
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 10 months ago
- A design automation framework to engineer decision diagrams yourself☆25Mar 13, 2026Updated last week
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆65Oct 9, 2024Updated last year
- SystemVerilog frontend for Yosys☆210Updated this week
- Integer Multiplier Generator for Verilog☆24Jul 4, 2025Updated 8 months ago
- ☆17Nov 3, 2025Updated 4 months ago
- Circuit IR Compilers and Tools☆2,065Updated this week
- BTOR2 MLIR project☆26Jan 17, 2024Updated 2 years ago
- 21st century electronic design automation tools, written in Rust.☆36Updated this week
- A collection of URLs related to High Level Synthesis (HLS).☆13Jun 26, 2021Updated 4 years ago
- Fibertree emulator☆17Nov 4, 2024Updated last year
- PandA-bambu public repository☆314Feb 10, 2026Updated last month