nandland / spi-slaveLinks
SPI Slave for FPGA in Verilog and VHDL
☆203Updated last year
Alternatives and similar repositories for spi-slave
Users that are interested in spi-slave are comparing it to the libraries listed below
Sorting:
- SPI Master for FPGA - VHDL and Verilog☆296Updated last year
- Verilog UART☆173Updated 12 years ago
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆354Updated last year
- Verilog SPI master and slave☆55Updated 9 years ago
- An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器,为低端FPGA嵌入式系统提供廉价、大容量的存储。☆182Updated last year
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆72Updated 4 years ago
- This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块:UART接收器、UART发送器、UART转AXI4交互式调…☆218Updated last year
- Fully parametrizable combinatorial parallel LFSR/CRC module☆151Updated 4 months ago
- I2C Master and Slave☆38Updated 10 years ago
- SDRAM controller with AXI4 interface☆94Updated 5 years ago
- Vivado诸多IP,包括图像处理等☆209Updated 11 months ago
- AHB3-Lite Interconnect☆89Updated last year
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆129Updated 5 years ago
- Interface Protocol in Verilog☆50Updated 5 years ago
- Pipeline FFT Implementation in Verilog HDL☆122Updated 6 years ago
- DDR2 memory controller written in Verilog☆77Updated 13 years ago
- 视频旋转(2019FPGA大赛)☆34Updated 5 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆492Updated 3 years ago
- Verilog digital signal processing components☆143Updated 2 years ago
- Basic RISC-V Test SoC☆137Updated 6 years ago
- FPGA Logic Analyzer and GUI☆134Updated 2 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆208Updated last year
- Verilog UART☆494Updated 4 months ago
- AMBA bus generator including AXI, AHB, and APB☆105Updated 3 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆64Updated 5 years ago
- A full-speed device-side USB peripheral core written in Verilog.☆232Updated 2 years ago
- RTL Verilog library for various DSP modules☆90Updated 3 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆83Updated 2 years ago
- Fixed Point Math Library for Verilog☆134Updated 10 years ago
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 5 years ago