A huge collection of VHDL/Verilog open-source IP cores scraped from the web
☆154Oct 27, 2015Updated 10 years ago
Alternatives and similar repositories for opencores-ip
Users that are interested in opencores-ip are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- few python scripts to clone all IP cores from opencores.org☆32Jan 8, 2024Updated 2 years ago
- A huge collection of VHDL/Verilog open-source IP cores scraped from the web☆630Jan 18, 2023Updated 3 years ago
- IPv4/UDP stack written in VHDL code, for interfacing with an FPGA over Ethernet☆13Jun 2, 2021Updated 5 years ago
- RTL implementation of the low latency ethernet modules for the NASDAQ HFT FPGA project.☆72Jan 10, 2024Updated 2 years ago
- 10G Low Latency Ethernet☆111Jul 15, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆22Sep 30, 2026Updated 2 weeks ago
- SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations☆22Apr 12, 2026Updated 6 months ago
- ☆26Jun 17, 2014Updated 12 years ago
- Design and UVM-TB of RISC -V Microprocessor☆36Jun 27, 2024Updated 2 years ago
- Special Function Units (SFUs) are hardware accelerators, their implementation helps improve the performance of GPUs to process some of th…☆19Sep 21, 2025Updated last year
- FPGA, CuDNN/CUDA & C++ Hybrid infrastructure for ultra low-latency algorithmic trading. Implements market data parsing, order book manage…☆26Apr 24, 2026Updated 5 months ago
- RISC-V Ibex core with Wishbone B4 interface☆22May 30, 2026Updated 4 months ago
- 24bit CPU with integrated GPU made in Logisim☆15Mar 3, 2026Updated 7 months ago
- ☆211Oct 17, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆100Updated this week
- ☆25Apr 24, 2026Updated 5 months ago
- Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀☆59Mar 3, 2024Updated 2 years ago
- A roadmap for those who want to build a career as an FPGA / ASIC Engineer☆712May 31, 2026Updated 4 months ago
- ☆12Apr 3, 2017Updated 9 years ago
- Supercharged USB bootloader for various PIC24/dsPIC33 MCUs.☆12Jul 8, 2021Updated 5 years ago
- This repository contains the details and the code for the MIPS32 ISA based RISC Processor, which is implemented in 5 stage pipelined conf…☆23Apr 26, 2023Updated 3 years ago
- C++ implementation of Reed-Solomon encoding/decoding☆18Feb 9, 2024Updated 2 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- PW-Sat2 hardware designed by the PW-Sat2 team☆13May 20, 2019Updated 7 years ago
- TCL scripts for FPGA (Xilinx)☆36Jul 5, 2022Updated 4 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆20Jan 28, 2022Updated 4 years ago
- To develop Arm Cortex-M0 based SoCs, from creating high-level functional specifications to design, implementation and testing on FPGA pla…☆45Dec 24, 2020Updated 5 years ago
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆26Nov 9, 2025Updated 11 months ago
- ☆18Mar 30, 2025Updated last year
- Hack@DAC 2021☆21Jul 24, 2024Updated 2 years ago
- this folder contains different algorithms implemented on FPGA☆13Dec 30, 2023Updated 2 years ago
- Open Logic FPGA Standard Library☆1,027Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- VHDL Implementation☆15Oct 9, 2014Updated 12 years ago
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆21Feb 27, 2024Updated 2 years ago
- ☆19Jun 2, 2025Updated last year
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆123May 11, 2023Updated 3 years ago
- I2C ROM for EDID (Extended Display Identification Data) on FPGAs☆25Nov 13, 2015Updated 10 years ago
- Automatically exported from code.google.com/p/gnsssdr☆17Mar 13, 2015Updated 11 years ago
- Homework assignments for CIS 4710/5710☆41Sep 4, 2026Updated last month