Alternatives and similar repositories for core_jpeg

Users that are interested in core_jpeg are comparing it to the libraries listed below

• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆384Updated 3 months ago
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆78Updated 2 years ago
• ultraembedded / FPGAmp
  720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)
  ☆281Updated 4 years ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆383Updated 2 weeks ago
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆516Updated 3 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆98Updated 6 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆157Updated 7 months ago
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆128Updated 3 years ago
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆315Updated 5 months ago
• fpganinja / taxi
  AXI, AXI stream, Ethernet, and PCIe components in System Verilog
  ☆394Updated 3 weeks ago
• WangXuan95 / FPGA-Gzip-compressor
  An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …
  ☆139Updated 2 years ago
• WangXuan95 / FPGA-MPEG2-encoder
  An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器，可实现视频压缩。
  ☆136Updated last year
• nanamake / r22sdf
  Pipeline FFT Implementation in Verilog HDL
  ☆133Updated 6 years ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆156Updated 2 years ago
• jamieiles / uart
  Verilog UART
  ☆182Updated 12 years ago
• projf / display_controller
  FPGA display controller with support for VGA, DVI, and HDMI.
  ☆239Updated 5 years ago
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆256Updated 6 years ago
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆214Updated last year
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆236Updated 2 years ago
• benreynwar / fft-dit-fpga
  Verilog module for calculation of FFT.
  ☆183Updated 13 years ago
• stffrdhrn / sdram-controller
  Verilog SDRAM memory controller
  ☆345Updated 8 years ago
• hell03end / verilog-uart
  Simple 8-bit UART realization on Verilog HDL.
  ☆110Updated last year
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆589Updated 5 months ago
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆311Updated last year
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆277Updated 5 years ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆156Updated 3 years ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆125Updated 3 years ago
• freecores / verilog_fixed_point_math_library
  Fixed Point Math Library for Verilog
  ☆143Updated 11 years ago
• danshanley / FPU
  IEEE 754 floating point unit in Verilog
  ☆145Updated 9 years ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆144Updated 6 years ago