Alternatives and similar repositories for core_jpeg

Users that are interested in core_jpeg are comparing it to the libraries listed below

• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆467Updated 3 years ago
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆333Updated last week
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆76Updated 2 years ago
• WangXuan95 / FPGA-MPEG2-encoder
  An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器，可实现视频压缩。
  ☆125Updated last year
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆286Updated last month
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆93Updated 5 years ago
• projf / display_controller
  FPGA display controller with support for VGA, DVI, and HDMI.
  ☆228Updated 5 years ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆349Updated last year
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆122Updated 2 years ago
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆249Updated 6 years ago
• ultraembedded / FPGAmp
  720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)
  ☆278Updated 4 years ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆560Updated last month
• fpganinja / taxi
  AXI, AXI stream, Ethernet, and PCIe components in System Verilog
  ☆236Updated this week
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆269Updated 4 years ago
• jamieiles / uart
  Verilog UART
  ☆165Updated 11 years ago
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆231Updated 2 years ago
• WangXuan95 / FPGA-Gzip-compressor
  An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …
  ☆123Updated last year
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆199Updated last year
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆125Updated 6 years ago
• alexforencich / cocotbext-axi
  AXI interface modules for Cocotb
  ☆261Updated last year
• adki / gen_amba_2021
  AMBA bus generator including AXI4, AXI3, AHB, and APB
  ☆205Updated last year
• danshanley / FPU
  IEEE 754 floating point unit in Verilog
  ☆137Updated 9 years ago
• aiminickwong / H264
  H264视频解码verilog实现
  ☆82Updated 7 years ago
• openhwgroup / cvfpu
  Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
  ☆497Updated 3 months ago
• WangXuan95 / FPGA-SDcard-Reader
  An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。
  ☆299Updated last year
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆147Updated 3 months ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆139Updated 2 years ago
• openasic-org / xk265
  xk265：HEVC/H.265 Video Encoder IP Core (RTL)
  ☆249Updated 2 years ago
• WangXuan95 / FPGA-DDR-SDRAM
  An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。
  ☆179Updated last year
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆209Updated 10 months ago