0xArt / Tiny_But_Mighty_I2C_Master_VerilogLinks
I2C Master Verilog module
☆34Updated 5 months ago
Alternatives and similar repositories for Tiny_But_Mighty_I2C_Master_Verilog
Users that are interested in Tiny_But_Mighty_I2C_Master_Verilog are comparing it to the libraries listed below
Sorting:
- A set of Wishbone Controlled SPI Flash Controllers☆91Updated 3 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆75Updated 2 years ago
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆30Updated 2 years ago
- UART -> AXI Bridge☆63Updated 4 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆95Updated 5 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆66Updated 5 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆80Updated 3 years ago
- Verilog wishbone components☆123Updated last year
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆51Updated last year
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆69Updated 4 years ago
- A series of CORDIC related projects☆117Updated last year
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆41Updated last month
- A collection of phase locked loop (PLL) related projects☆112Updated last year
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆87Updated 2 years ago
- Minimal DVI / HDMI Framebuffer☆82Updated 5 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆66Updated last year
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆70Updated this week
- Extensible FPGA control platform☆61Updated 2 years ago
- UART models for cocotb☆32Updated 2 months ago
- Ethernet MAC 10/100 Mbps☆84Updated 6 years ago
- Small (Q)SPI flash memory programmer in Verilog☆65Updated 3 years ago
- SDRAM controller for MIPSfpga+ system☆24Updated 5 years ago
- Generator for CRC HDL code (VHDL, Verilog, MyHDL)☆43Updated 2 years ago
- Verilog digital signal processing components☆159Updated 3 years ago
- Verilog modules required to get the OV7670 camera working☆75Updated 7 years ago
- A simple DDR3 memory controller☆61Updated 2 years ago
- Single Port RAM, Dual Port RAM, FIFO☆27Updated 3 years ago
- Verilog SPI master and slave☆61Updated 9 years ago
- ☆74Updated 3 years ago
- ☆110Updated 2 years ago