esynr3z / proto245
🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)
☆35Updated 3 years ago
Alternatives and similar repositories for proto245:
Users that are interested in proto245 are comparing it to the libraries listed below
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆30Updated 3 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆86Updated 4 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆72Updated 9 months ago
- Nitro USB FPGA core☆84Updated 10 months ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆90Updated 4 years ago
- Wishbone interconnect utilities☆38Updated 7 months ago
- Minimal DVI / HDMI Framebuffer☆78Updated 4 years ago
- ☆44Updated 2 years ago
- Basic USB-CDC device core (Verilog)☆75Updated 3 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆76Updated 2 years ago
- IEEE P1735 decryptor for VHDL☆29Updated 9 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆61Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆49Updated this week
- Verilog wishbone components☆113Updated last year
- Small (Q)SPI flash memory programmer in Verilog☆57Updated 2 years ago
- USB 2.0 Device IP Core☆53Updated 7 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆40Updated 4 years ago
- A comparison of 1st and 2nd order sigma delta DAC for FPGA☆55Updated 4 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆63Updated 2 years ago
- USB Full Speed PHY☆39Updated 4 years ago
- assorted library of utility cores for amaranth HDL☆85Updated 4 months ago
- High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model☆21Updated last month
- UART 16550 core☆32Updated 10 years ago
- Verilog digital signal processing components☆120Updated 2 years ago
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆83Updated 6 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆48Updated this week
- A wishbone controlled scope for FPGA's☆74Updated last year
- An open-source HDL register code generator fast enough to run in real time.☆40Updated this week
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆46Updated last year