Alternatives and similar repositories for Parallel-LZ77

Users that are interested in Parallel-LZ77 are comparing it to the libraries listed below

• fpgasystems / doppiodb
  doppioDB - A hardware accelerated database
  ☆51Updated 8 years ago
• s-kanev / XIOSim
  A detailed michroarchitectural x86 simulator
  ☆62Updated 8 years ago
• jameshegarty / rigel
  Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…
  ☆57Updated 5 years ago
• mit-carbon / Graphite
  A parallel, distributed simulator for multicores.
  ☆185Updated 10 years ago
• LEAP-FPGA / leap-documentation
  ☆23Updated 9 years ago
• jackwadden / ANMLZoo
  High-performance automata-processing engines are traditionally evaluated using a limited set of regular expression rulesets. While regula…
  ☆35Updated 2 years ago
• ccelio / riscv-boom-doc
  Documentation for the BOOM processor
  ☆47Updated 8 years ago
• ucb-bar / ccbench
  Memory System Microbenchmarks
  ☆65Updated 3 years ago
• ChrisCummins / paper-synthesizing-benchmarks
  📝 "Synthesizing Benchmarks for Predictive Modeling" (🥇 CGO'17 Best Paper)
  ☆22Updated 3 years ago
• udif / ctoverilog
  A C to verilog compiler
  ☆52Updated 10 years ago
• masc-ucsc / esesc
  ESESC: A Fast Multicore Simulator
  ☆140Updated 3 months ago
• stanford-ppl / spatial-lang
  Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"
  ☆101Updated 7 years ago
• ucb-bar / esp-llvm
  UCB-BAR fork of LLVM! NOT UPSTREAM RISCV LLVM
  ☆121Updated 5 years ago
• etherzhhb / Shang
  The Shang high-level synthesis framework
  ☆120Updated 11 years ago
• fpgasystems / caribou
  Caribou: Distributed Smart Storage built with FPGAs
  ☆68Updated 7 years ago
• cambridgehackers / connectal
  Connectal is a framework for software-driven hardware development.
  ☆176Updated 2 years ago
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆53Updated 5 years ago
• admk / soap
  soap - Structural Optimisation of Arithmetic Programs
  ☆24Updated 9 years ago
• wsmoses / Tapir-LLVM
  Tapir extension to LLVM for optimizing Parallel Programs
  ☆132Updated 5 years ago
• ucb-bar / berkeley-testfloat-3
  TestFloat release 3
  ☆73Updated 11 months ago
• LvNA-system / labeled-RISC-V
  ☆169Updated 4 years ago
• jeffreycassidy / BlueLink
  Bluespec SystemVerilog library for use of the IBM Coherent Accelerator-Processor Interface (CAPI)
  ☆11Updated 9 years ago
• cliffordwolf / bextdep
  Reference Hardware Implementations of Bit Extract/Deposit Instructions
  ☆24Updated 8 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆41Updated 10 years ago
• facebookresearch / deepfloat
  An exploration of log domain "alternative floating point" for hardware ML/AI accelerators.
  ☆400Updated 2 years ago
• cliffordwolf / xbitmanip
  RISC-V XBitmanip Extension
  ☆25Updated 6 years ago
• ctrippel / TriCheck
  ☆13Updated 8 years ago
• CTSRD-CHERI / beri
  The BERI and CHERI processor and hardware platform
  ☆50Updated 8 years ago
• ydmao / Metis
  MapReduce for multi-core
  ☆50Updated 12 years ago
• avadhpatel / marss
  PTLsim and QEMU based Computer Architecture Research Simulator
  ☆131Updated 3 years ago