ediloren / FastCap2Links
FastCap is the premium capacitance solver originally developed at M.I.T. on Unix platform. A de-facto golden reference standard, FastCap extracts the capacitances of any 3D conductive geometry in free space or embedded in arbitrary, piecewise-constant dielectrics, by solving the Maxwell equations in quasi-static regime. For more information, vis…
☆51Updated 10 years ago
Alternatives and similar repositories for FastCap2
Users that are interested in FastCap2 are comparing it to the libraries listed below
Sorting:
- FastHenry is the premium inductance solver originally developed at M.I.T. on Unix platform. A de-facto golden reference standard, FastHen…☆70Updated 6 years ago
- FasterCap is a powerful three- and two-dimensional capactiance extraction program.☆31Updated 6 years ago
- Verilog-A simulation models☆91Updated 2 months ago
- ADMS is a code generator for some of Verilog-A☆103Updated 3 years ago
- Easy access to OpenSource TCAD Tools☆41Updated 3 weeks ago
- Python package for IBIS-AMI model development and testing☆32Updated this week
- Serial communication link bit error rate tester simulator, written in Python.☆120Updated 3 weeks ago
- Open-source version of SLiCAP, implemented in python☆37Updated last year
- XicTools: Xic graphical editor, WRspice circuit simulator, and accessories. for electronic design.☆179Updated 2 months ago
- A tiny Python package to parse spice raw data files.☆53Updated 3 years ago
- Automatic generation of real number models from analog circuits☆48Updated last year
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆25Updated last year
- Fork from https://sourceforge.net/projects/gds3d☆68Updated last year
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆49Updated 4 months ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆66Updated this week
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆18Updated 2 years ago
- This repository is for (pre-)release versions of the Revolution EDA.☆58Updated 3 weeks ago
- Parasitic Extraction for KLayout☆37Updated 2 weeks ago
- A simple but powerful Python package for creating photolithography masks in the GDSII format.☆95Updated 2 years ago
- This project is dedicated to building an ElectroMagnetic workbench for FreeCAD. FreeCAD is a free 3D parametric CAD. FreeCAD is used as p…☆65Updated last year
- A port of the MATLAB Delta Sigma Toolbox based on free software and very little sleep☆94Updated 3 years ago
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆26Updated last year
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆129Updated 2 years ago
- Parsing and generating popular formats of circuit netlist☆39Updated 3 years ago
- An innovative Verilog-A compiler - reloaded☆36Updated last week
- BAG framework☆41Updated last year
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆55Updated 8 years ago
- Files for Advanced Integrated Circuits☆34Updated 2 weeks ago
- Reads a Cadence techfile into KLayout and produces layer properties from it☆27Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆41Updated 2 years ago