Alternatives and similar repositories for tiny5

Users that are interested in tiny5 are comparing it to the libraries listed below

• Ashwin-Rajesh / RiSC-16
  RiSC 16 is a simple 16 bit instruction set with 8 instructions and 3 instruction formats. This is an RTL implementation in verilog, instr…
  ☆12Updated 3 years ago
• lioncash / DolphinPPCTests
  PPC instruction tests
  ☆11Updated last year
• ToNi3141 / RasterIX
  OpenGL 1.x implementation for FPGAs
  ☆96Updated this week
• Wren6991 / ChristmasSoC
  Dual-core RISC-V SoC with JTAG, atomics, SDRAM
  ☆25Updated 3 years ago
• SonoSooS / libjz
  Jazelle driver and documentation
  ☆28Updated 3 years ago
• OpenPOWERFoundation / a2o
  The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, …
  ☆49Updated 3 months ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆99Updated 3 years ago
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆34Updated this week
• Ravenslofty / sudbury
  IA-64 emulator
  ☆15Updated 4 years ago
• j-core / jcore-cpu
  J-Core J2/J32 5 stage pipeline CPU core
  ☆53Updated 4 years ago
• lioncash / biscuit
  A runtime code generator for RISC-V
  ☆58Updated last month
• fail0verflow / mini
  MINI (MINI is not IOS) is a open source replacement for Nintendo/BroadOn's IOS (from git.bootmii.org)
  ☆64Updated 2 years ago
• lmEshoo / sp-i586
  soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…
  ☆32Updated 8 years ago
• PS-FPGA / ps-fpga
  The PS-FPGA project (top level)
  ☆24Updated 4 years ago
• himanshu5-prog / vortexGPU
  ☆22Updated 4 years ago
• SKGleba / bob
  An open source monolithic kernel for Playstation Vita's Toshiba MeP security processor
  ☆20Updated 6 months ago
• grantae / OpenMIPS
  A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…
  ☆77Updated 6 years ago
• hedgeberg / GlitchHammer
  A custom coprocessor and SoC for hardware security experiments in electronics.
  ☆12Updated 8 years ago
• darklife / udarkrisc
  u[Dark]RISC -- "micro-darkrisc" -- an early 16-bit micro-RISC processor defined before DarkRISCV
  ☆16Updated 2 years ago
• ToNi3141 / RasteriCEr
  Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)
  ☆39Updated 3 years ago
• catphish / PS1
  A very immature PS1 emulator
  ☆16Updated 4 years ago
• aniketnk / circular-queue-verilog
  Implementation of a circular queue in hardware using verilog.
  ☆17Updated 6 years ago
• VegaASM / Waltress
  100% Broadway compliant PowerPC Assembler completely handwritten in PowerPC
  ☆16Updated last year
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 4 months ago
• ladystarbreeze / mina-isa
  The MINA Instruction Set Architecture.
  ☆17Updated 2 years ago
• ChrisPVille / jtaglet
  Easy-to-use JTAG TAP and Debug Controller core written in Verilog
  ☆32Updated 6 years ago
• OpenPOWERFoundation / a2i
  The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers
  ☆45Updated 3 years ago
• fleroviux / lunar
  A fast-ish Nintendo DS emulator with a JIT recompiler and multithreading.
  ☆66Updated last year
• lcq2 / risc-666
  RISC-V user-mode emulator that runs DooM
  ☆54Updated 6 years ago
• marcan / skyeye-starlet
  Very hacky Starlet emulator. Here be dragons, this was never meant to be released.
  ☆12Updated 8 years ago