Alternatives and similar repositories for MIPS_R10K_Processor

Users that are interested in MIPS_R10K_Processor are comparing it to the libraries listed below

• ryeleo / Mips-FPGA
  Mips fpga implemented using Verilog HDL. Goal is to synthesis on Altera FPGA.
  ☆13Updated 8 years ago
• rakeshdhakla / ChampSim-master-BTBX
  BTB-X HPCA23 code
  ☆13Updated 3 years ago
• ElectronAsh / sim_3do
  Verilator / Imgui sim for 3DO FPGA core attempt
  ☆13Updated 3 years ago
• aniketnk / circular-queue-verilog
  Implementation of a circular queue in hardware using verilog.
  ☆17Updated 6 years ago
• grantae / OpenMIPS
  A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…
  ☆83Updated 6 years ago
• SpinalHDL / SpinalDoc
  SpinalHDL documentation assets (pictures, slides, ...)
  ☆32Updated last year
• xerpi / tiny5
  RISC-V Processor Implementation (RV32IM, TileLink-UL)
  ☆24Updated 2 years ago
• himanshu5-prog / vortexGPU
  ☆24Updated 4 years ago
• valar1234 / MIPS
  A classic 5-stage pipeline MIPS 32-bit processor, including a 2-bit branch predictor, a branch prediction buffer and a direct-mapped cach…
  ☆75Updated last year
• Kenji-Ishimaru / polyphony
  3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.
  ☆92Updated 5 years ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆66Updated 2 years ago
• ToNi3141 / RasterIX
  OpenGL 1.x implementation for FPGAs
  ☆112Updated last week
• waviousllc / wav-lpddr-hw
  Wavious DDR (WDDR) Physical interface (PHY) Hardware
  ☆122Updated 4 years ago
• OpenXiangShan / nexus-am
  ☆42Updated last week
• ToNi3141 / RasteriCEr
  Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)
  ☆40Updated 4 years ago
• Linux-RISC / IRIX-disk-cloning
  IRIX script to clone an IRIX XFS disk
  ☆12Updated 2 years ago
• regymm / quasiSoC
  Linux capable RISC-V SoC designed to be readable and useful.
  ☆158Updated last month
• ptimonen / n64-riistahillo
  Kumi-Daiko Beatoff 64 is a physics-based combat game in which one to four players try to survive endless waves tengu-masks and battle aga…
  ☆10Updated 5 years ago
• PS-FPGA / ps-fpga
  The PS-FPGA project (top level)
  ☆24Updated 4 years ago
• Ashwin-Rajesh / RiSC-16
  RiSC 16 is a simple 16 bit instruction set with 8 instructions and 3 instruction formats. This is an RTL implementation in verilog, instr…
  ☆12Updated 4 years ago
• stnolting / neorv32-verilog
  ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
  ☆101Updated 2 months ago
• jaywonchung / Verilog-Harvard-CPU
  Verilog implementation of various types of CPUs
  ☆73Updated 6 years ago
• lowRISC / muntjac
  64-bit multicore Linux-capable RISC-V processor
  ☆105Updated 9 months ago
• evantandersen / fpga-gpu
  A basic GPU for altera FPGAs
  ☆88Updated 6 years ago
• dawsonjon / verilog-math
  Mathematical Functions in Verilog
  ☆97Updated 4 years ago
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆84Updated 5 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆97Updated 3 years ago
• n64dev / n64dev
  Open source Nintendo 64
  ☆11Updated 11 years ago
• stnolting / riscv-gcc-prebuilt
  📦 Prebuilt RISC-V GCC toolchains for x64 Linux.
  ☆107Updated 11 months ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆17Updated 5 years ago