Alternatives and similar repositories for bfcpu2

Users that are interested in bfcpu2 are comparing it to the libraries listed below

• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• SteffenReith / J1Sc
  A reimplementation of a tiny stack CPU
  ☆85Updated last year
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆13Updated 6 years ago
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆29Updated 5 years ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆62Updated 3 months ago
• ZipCPU / s6soc
  CMod-S6 SoC
  ☆42Updated 7 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆41Updated 3 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆46Updated 6 months ago
• tomverbeure / jtag_uart_example
  Mini CPU design with JTAG UART support
  ☆20Updated 4 years ago
• projf / fpgatools
  Tools for FPGA development.
  ☆48Updated 3 weeks ago
• Wren6991 / DOOMSoC
  A SoC for DOOM
  ☆19Updated 4 years ago
• mrisc32 / mc1
  A computer (FPGA SoC) based on the MRISC32-A1 CPU
  ☆55Updated 2 years ago
• mattvenn / vga-clock
  Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
  ☆62Updated 3 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆80Updated 4 years ago
• aniketnk / circular-queue-verilog
  Implementation of a circular queue in hardware using verilog.
  ☆17Updated 6 years ago
• MJoergen / HyperRAM
  Portable HyperRAM controller
  ☆58Updated 8 months ago
• MorrisMA / MiniCPU-S
  Minimal FPGA Processor Core for Stack-based CPU for CPLDs Using Bit-Serial Architecture
  ☆15Updated 11 years ago
• mattvenn / fpga-sram
  mystorm sram test
  ☆28Updated 7 years ago
• Martoni / HdmiCore
  HDMI core in Chisel HDL
  ☆51Updated last year
• pepijndevos / seqpu
  A bit-serial CPU
  ☆19Updated 5 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆43Updated 2 years ago
• olofk / qerv
  ☆17Updated 3 months ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 3 years ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆43Updated 4 years ago
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆32Updated 2 years ago
• AngelTerrones / Algol
  A RISC-V CPU (Outdated: using priviledge v1.7)
  ☆25Updated 6 years ago
• Wren6991 / ChristmasSoC
  Dual-core RISC-V SoC with JTAG, atomics, SDRAM
  ☆25Updated 3 years ago
• mmicko / cross-fpga
  Cross compile FPGA tools
  ☆21Updated 4 years ago
• hamsternz / emulate-risc-v
  A very simple RISC-V ISA emulator.
  ☆38Updated 4 years ago