wady101 / PYNQ_Z2-Audio
Audio streaming architecture for the PYNQ-Z2 board
☆9Updated 5 years ago
Alternatives and similar repositories for PYNQ_Z2-Audio:
Users that are interested in PYNQ_Z2-Audio are comparing it to the libraries listed below
- RFSoC Spectrum Analyser Module on PYNQ.☆70Updated 6 months ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆38Updated 2 years ago
- PYNQ Composabe Overlays☆69Updated 7 months ago
- PYNQ support and examples for Kria SOMs☆101Updated 5 months ago
- Temporary repo to gather information about the Kria KV260 board☆62Updated 3 years ago
- Vivado build system☆66Updated last month
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆131Updated this week
- Open-sourcing the PYNQ & RFSoC workshop materials☆56Updated 4 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆95Updated last year
- Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)☆64Updated last year
- Python script to transform a VCD file to wavedrom format☆75Updated 2 years ago
- FPGA and Digital ASIC Build System☆71Updated this week
- Python productivity for RFSoC platforms☆62Updated 7 months ago
- Board repo for the ZCU216 RFSOC☆25Updated 2 years ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆54Updated this week
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆64Updated 7 years ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆40Updated 6 years ago
- ☆24Updated 6 months ago
- ☆32Updated last year
- Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.☆149Updated 2 years ago
- 10G Low Latency Ethernet☆47Updated last year
- ☆40Updated 10 months ago
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 2 years ago
- A configurable C++ generator of pipelined Verilog FFT cores☆227Updated 9 months ago
- A getting started presentation (with examples) about how to use FLOSS for FPGA development.☆35Updated last year
- Vitis Model Composer Examples and Tutorials☆80Updated this week
- Avnet Board Definition Files☆129Updated last week
- ☆272Updated last month
- VHDL-2008 Support Library☆57Updated 8 years ago