Alternatives and similar repositories for ZYNQ-Custom-Board-Bring-Up-Guide

Users that are interested in ZYNQ-Custom-Board-Bring-Up-Guide are comparing it to the libraries listed below

• BerkeleyLab / XVC-FTDI-JTAG
  Xilinx virtual cable server for generic FTDI 4232H.
  ☆59Updated last year
• derekmulcahy / xvcpi
  Xilinx Virtual Cable Server for Raspberry Pi
  ☆115Updated 3 years ago
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆83Updated last year
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆87Updated 2 years ago
• dawsonjon / FPGA-radio
  Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
  ☆109Updated 8 years ago
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆119Updated 4 years ago
• FMCHUB / Lib_Altium
  Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard
  ☆44Updated 3 years ago
• Avnet / hdl
  ☆112Updated 5 months ago
• q3k / zturn-stuff
  Migrated to Codeberg
  ☆92Updated 8 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆94Updated 5 years ago
• MorrisMA / 1PPS-DPLL
  DPLL for phase-locking to 1PPS signal
  ☆32Updated 9 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆98Updated 5 years ago
• tmbinc / xvcd
  Xilinx Virtual Cable Daemon
  ☆123Updated 6 months ago
• fjullien / migen_litex_tutorials
  ☆113Updated 2 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆87Updated last year
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆45Updated 3 months ago
• OpenDGPS / zynq-axi-dma-sg
  Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020
  ☆54Updated 8 years ago
• hdl-util / mipi-csi-2
  Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
  ☆71Updated 5 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆64Updated this week
• LukiLeu / FPGA_ADC
  An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components
  ☆46Updated 4 years ago
• enjoy-digital / usb3_pipe
  USB3 PIPE interface for Xilinx 7-Series
  ☆228Updated 3 years ago
• ultraembedded / core_usb_cdc
  Basic USB-CDC device core (Verilog)
  ☆80Updated 4 years ago
• AnttiLukats / HackaZynq
  Open Source ZYNQ Board
  ☆31Updated 10 years ago
• bggardner / can-lite-vhdl
  A lightweight Controller Area Network (CAN) controller in VHDL
  ☆28Updated 10 months ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year
• ATaylorCEngFIET / MicroZed-Chronicles
  Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
  ☆197Updated 6 years ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated last year
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆96Updated last year
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆45Updated 5 years ago