Alternatives and similar repositories for DSPHDL

Users that are interested in DSPHDL are comparing it to the libraries listed below

• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆76Updated 3 weeks ago
• MJoergen / formal
  Playing around with Formal Verification of Verilog and VHDL
  ☆64Updated 4 years ago
• tsfpga / tsfpga
  A flexible and scalable development platform for modern FPGA projects.
  ☆38Updated 3 weeks ago
• tmeissner / psl_with_ghdl
  Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
  ☆66Updated 9 months ago
• gsmecher / pyxsi
  Python/C/RTL cosimulation with Xilinx's xsim simulator
  ☆76Updated 3 months ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆51Updated last year
• suoto / fpga_cores
  ☆33Updated 2 years ago
• hVHDL / hVHDL_example_project
  An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…
  ☆30Updated 10 months ago
• tmeissner / cryptocores
  cryptography ip-cores in vhdl / verilog
  ☆41Updated 4 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆66Updated this week
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆80Updated this week
• Toroid-io / vcd2wavedrom
  Python script to transform a VCD file to wavedrom format
  ☆81Updated 3 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆35Updated 8 months ago
• yrrapt / amsat_txrx_ic
  An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)
  ☆71Updated 4 years ago
• ghdl / ghdl-cosim
  Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL
  ☆51Updated this week
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆186Updated 3 weeks ago
• FPGA-Systems / drawio-hdl-builder
  Drawio => VHDL and Verilog
  ☆61Updated 2 years ago
• rodrigomelo9 / FOSS-for-FPGAs
  A getting started presentation (with examples) about how to use FLOSS for FPGA development.
  ☆36Updated 2 years ago
• Xilinx / chipscopy
  ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…
  ☆62Updated this week
• themperek / spicebind
  SpiceBind – spice inside HDL simulator
  ☆56Updated 4 months ago
• wulffern / tt06-sar
  SAR ADC on tiny tapeout
  ☆43Updated 9 months ago
• HDLForBeginners / Examples
  ☆110Updated 2 years ago
• VHDL / PoC
  IP Core Library - Published and maintained by the Open Source VHDL Group
  ☆40Updated last month
• TinyTapeout / tinytapeout-ihp-0p1
  Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process
  ☆18Updated 7 months ago
• paulscherrerinstitute / psi_fix
  Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)
  ☆25Updated last year
• OSVVM / OsvvmLibraries
  Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
  ☆71Updated this week
• paulscherrerinstitute / psi_fpga_all
  Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.
  ☆41Updated last month
• wyvernSemi / riscV
  Open source ISS and logic RISC-V 32 bit project
  ☆61Updated 2 weeks ago
• antmicro / topwrap
  A Python package for generating HDL wrappers and top modules for HDL sources
  ☆39Updated last week
• ATaylorCEngFIET / Xilinx_BootCamp
  Slides and material for Xilinx bootcamp
  ☆22Updated 4 years ago