Alternatives and similar repositories for 32-Verilog-Mini-Projects

Users that are interested in 32-Verilog-Mini-Projects are comparing it to the libraries listed below

• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆434Updated 5 years ago
• alexforencich / verilog-uart
  Verilog UART
  ☆480Updated 2 months ago
• snbk001 / Verilog-Design-Examples
  Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…
  ☆120Updated last year
• ultraembedded / cores
  Various HDL (Verilog) IP Cores
  ☆786Updated 3 years ago
• alexforencich / verilog-axi
  Verilog AXI components for FPGA implementation
  ☆1,713Updated 2 months ago
• viduraakalanka / HDL-Bits-Solutions
  This is a repository containing solutions to the problem statements given in HDL Bits website.
  ☆348Updated last year
• dawsonjon / fpu
  synthesiseable ieee 754 floating point library in verilog
  ☆633Updated 2 years ago
• pulp-platform / axi
  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
  ☆1,272Updated last week
• Gowtham1729 / Image-Processing
  Image Processing Toolbox in Verilog using Basys3 FPGA
  ☆199Updated last year
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆335Updated last year
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆454Updated 3 years ago
• alexforencich / verilog-axis
  Verilog AXI stream components for FPGA implementation
  ☆802Updated 2 months ago
• raysalemi / uvmprimer
  Contains the code examples from The UVM Primer Book sorted by chapters.
  ☆530Updated 3 years ago
• AniketBadhan / Convolutional-Neural-Network
  Implementation of CNN using Verilog
  ☆211Updated 7 years ago
• seldridge / verilog
  Repository for basic (and not so basic) Verilog blocks with high re-use potential
  ☆573Updated 7 years ago
• abdelazeem201 / ASIC-Design-Roadmap
  The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a c…
  ☆328Updated 8 months ago
• alexforencich / verilog-i2c
  Verilog I2C interface for FPGA implementation
  ☆606Updated 2 months ago
• pConst / basic_verilog
  Must-have verilog systemverilog modules
  ☆1,768Updated last month
• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆287Updated last year
• alfadelta10010 / COD-Lab
  Instructions & Assignments for COD Lab - UE22EC352A
  ☆4Updated 6 months ago
• taichi-ishitani / tvip-axi
  AMBA AXI VIP
  ☆399Updated 10 months ago
• VerificationExcellence / SystemVerilogReference
  training labs and examples
  ☆420Updated 2 years ago
• raulbehl / 100DaysOfRTL
  100 Days of RTL
  ☆365Updated 9 months ago
• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆122Updated 4 years ago
• pulp-platform / common_cells
  Common SystemVerilog components
  ☆618Updated last week
• troyguo / awesome-dv
  Awesome ASIC design verification
  ☆295Updated 3 years ago
• alexforencich / verilog-pcie
  Verilog PCI express components
  ☆1,289Updated last year
• HonkW93 / automatic-verilog
  automatic-verilog based on vimscript
  ☆262Updated last year
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆85Updated 3 years ago
• xiaop1 / Verilog-Practice
  HDLBits website practices & solutions
  ☆734Updated last year