ucdrstdenis / cdsAsyncLinks
cdsAsync: An Asynchronous QDI VLSI Toolset & Schematic Library
☆25Updated this week
Alternatives and similar repositories for cdsAsync
Users that are interested in cdsAsync are comparing it to the libraries listed below
Sorting:
- BAG framework☆41Updated 11 months ago
- Intel's Analog Detailed Router☆39Updated 5 years ago
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆23Updated 6 years ago
- AMC: Asynchronous Memory Compiler☆49Updated 5 years ago
- Open source process design kit for 28nm open process☆59Updated last year
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆55Updated this week
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆30Updated 4 years ago
- ☆20Updated 3 years ago
- This project shows the design process of the main blocks of a typical RX frontend system.☆23Updated 4 years ago
- This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Proce…☆23Updated last year
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆17Updated 2 months ago
- SKY130 SRAM macros generated by SRAM 22☆16Updated last week
- An open source PDK using TIGFET 10nm devices.☆49Updated 2 years ago
- Completed LDO Design for Skywaters 130nm☆14Updated 2 years ago
- ☆19Updated 11 months ago
- LAYout with Gridded Objects☆29Updated 5 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 4 years ago
- Open Source PHY v2☆29Updated last year
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆27Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆38Updated 2 years ago
- Skywater 130nm Klayout Device Generators PDK☆31Updated last year
- ☆44Updated 5 years ago
- Circuit Automatic Characterization Engine☆50Updated 5 months ago
- submission repository for efabless mpw6 shuttle☆30Updated last year
- PLL Designs on Skywater 130nm MPW☆20Updated last year
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆72Updated 4 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆63Updated 2 weeks ago
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆36Updated 4 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆45Updated this week
- Library of open source Process Design Kits (PDKs)☆48Updated 3 weeks ago