Alternatives and similar repositories for chisel-arithmetics:

Users that are interested in chisel-arithmetics are comparing it to the libraries listed below

• hplp / aes_chisel
  Implementation of the Advanced Encryption Standard in Chisel
  ☆20Updated 2 years ago
• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 3 years ago
• masc-ucsc / fluid
  Fluid Pipelines
  ☆11Updated 6 years ago
• TsaiAnson / verif
  ☆11Updated 3 years ago
• chick / visualizer
  Provides dot visualizations of chisel/firrtl circuites
  ☆12Updated 5 years ago
• IBM / esp-chisel-accelerators
  Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)
  ☆23Updated 4 years ago
• msyksphinz-self / chisel-soc
  ☆9Updated 4 years ago
• jerry-D / 64-bit-Universal-Floating-Point-ISA-Compute-Engine
  RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine
  ☆22Updated 2 years ago
• maltanar / rosetta
  Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
  ☆33Updated 6 years ago
• PeterAaser / tdt4255-chisel-intro
  ☆25Updated 4 years ago
• freechipsproject / chisel-coverage
  A coverage library for Chisel designs
  ☆11Updated 4 years ago
• sifive / api-generator-sifive
  Wake build descriptions of hardware generators
  ☆12Updated 4 years ago
• tmeissner / vhdl_verification
  Examples and design pattern for VHDL verification
  ☆15Updated 8 years ago
• efabless / sky130_sram_macros_old
  ☆36Updated 2 years ago
• sifive / block-pio-sifive
  An example of on-boarding a PIO block in with duh and wake
  ☆12Updated 4 years ago
• tdb-alcorn / chisel-formal
  ☆23Updated 3 years ago
• pulp-platform / adv_dbg_if
  Advanced Debug Interface
  ☆12Updated last year
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆32Updated last year
• pezy-computing / pzbcm
  Basic Common Modules
  ☆36Updated last month
• maltanar / systemc-chisel-tools
  A collection of tools for working with Chisel-generated hardware in SystemC
  ☆16Updated 5 years ago
• zhemao / creek
  A vector processor implemented in Chisel
  ☆21Updated 10 years ago
• rahulk29 / sram22
  A configurable SRAM generator
  ☆42Updated last week
• thiemchu / rvcorep
  ☆9Updated 2 years ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆43Updated 6 months ago
• TUM-LIS / lisnoc
  LIS Network-on-Chip Implementation
  ☆29Updated 8 years ago
• accellera-official / crave
  Constrained RAndom Verification Enviroment (CRAVE)
  ☆17Updated last year
• whatmough / CHIPKIT
  CHIPKIT: An agile, reusable open-source framework for rapid test chip development
  ☆40Updated 4 years ago
• dirjud / Nitro-Parts-lib-Xilinx
  This is mainly a simulation library of xilinx primitives that are verilator compatible.
  ☆31Updated 6 months ago
• pulp-platform / apb
  APB Logic
  ☆12Updated last month
• anycore / anycore-riscv-src
  The RTL source for AnyCore RISC-V
  ☆30Updated 2 years ago