Alternatives and similar repositories for fft_verilog:

Users that are interested in fft_verilog are comparing it to the libraries listed below

• WangXuan95 / FPGA-HDMI
  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
  ☆52Updated 9 months ago
• caicaicai-ji / QSPI_FOR_SOC
  QSPI for SoC
  ☆22Updated 5 years ago
• flyjancy / CortexM0_SoC_Task
  Step by step tutorial for building CortexM0 SoC
  ☆37Updated 3 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆44Updated 2 weeks ago
• whik / cortex_m3_on_xc7a100t
  ☆16Updated 3 years ago
• suisuisi / basic_systemverilog
  Must-have verilog systemverilog modules
  ☆33Updated 2 years ago
• BigPig-Bro / Cyclone-IV
  【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板
  ☆21Updated last month
• JefferyLi0903 / MMC
  MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计
  ☆21Updated last year
• ganyunhan / DUAL-OV5640-for-GOWIN
  A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board
  ☆34Updated 3 years ago
• shun6-6 / Tri_Eth_UDP_pro_stack
  基于FPGA的三速以太网UDP协议栈设计
  ☆23Updated last year
• sunyata000 / PODES-M0O
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆21Updated 5 years ago
• lauchinyuan / FPGA_DDR3_Ctrl
  An AXI DDR3 SDRAM controller for FPGA
  ☆34Updated last year
• BigPig-Bro / Gowin
  【例程】国产高云FPGA 开发板及其工程
  ☆26Updated 6 months ago
• flyjancy / CortexM0_SoC
  Cortex M0 based SoC
  ☆72Updated 3 years ago
• redchenjs / wujian100_open
  平头哥无剑100开源SoC平台（双核E902，安全启动，BootROM，IOPMP，Mailbox，RSA-2048，SHA-2， WS2812，Flash）
  ☆18Updated last year
• freecores / robust_axi2ahb
  Generic AXI to AHB bridge
  ☆16Updated 10 years ago
• WangXuan95 / FPGA-QOI
  An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。
  ☆24Updated 7 months ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆36Updated 9 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆37Updated 3 years ago
• xiesicong / Cortex_m0
  Cortex_m0软核源码，可以在FPGA上直接跑，包含UART、定时器这些外设，可以用keil写用户代码。可以看看《Cortex-M0 全可编程SoC原理及实现》这本书
  ☆23Updated 4 years ago
• ericgineer / CORDIC
  The CORDIC algorithm implemented in Octave/MATLAB and Verilog
  ☆29Updated 10 years ago
• ultraembedded / fpga_test_soc
  A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)
  ☆32Updated 5 years ago
• vfinotti / ahb3lite_dma
  DMA core compatible with AHB3-Lite
  ☆10Updated 6 years ago
• Angelic47 / GowinDDR3_AXI4_SpinalHDL
  Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现
  ☆23Updated last year
• ian-lab / my_CortexM3
  ☆18Updated 3 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆24Updated 6 years ago
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆69Updated 3 years ago
• BAO-Rongxin / Intelligent-BLDC-driver
  The project includes codes, specification, presentation and other information.
  ☆26Updated 4 years ago
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆61Updated 8 months ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆39Updated 3 years ago