The CORDIC algorithm implemented in Octave/MATLAB and Verilog
☆32Mar 31, 2015Updated 11 years ago
Alternatives and similar repositories for CORDIC
Users that are interested in CORDIC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- configurable cordic core in verilog☆55Jul 17, 2014Updated 12 years ago
- NoC based MPSoC☆11Jul 17, 2014Updated 12 years ago
- Implementation of CORDIC Algorithms Using Verilog☆27Apr 26, 2021Updated 5 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 12 years ago
- sin(x), cos(x) calculation using CORDIC algorithm and BCD arbitrary precision math.☆10Oct 11, 2012Updated 14 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- An implementation of the CORDIC algorithm in Verilog.☆113Nov 19, 2018Updated 7 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆48Apr 15, 2024Updated 2 years ago
- QSPI for SoC☆25Nov 8, 2019Updated 6 years ago
- A CIC filter implemented in Verilog☆25Sep 7, 2015Updated 11 years ago
- VGA LCD Core (OpenCores)☆15May 22, 2018Updated 8 years ago
- SPI Master Core clone from OpenCores☆14Oct 4, 2013Updated 13 years ago
- FFT algorithm for fpga☆26Aug 17, 2021Updated 5 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- A implementation of a Cascaded Integrator Comb filter for the Cortex M4, designed to have an API similar to CMSIS-DSP. *Not currently wor…☆10May 9, 2014Updated 12 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 基于FPGA的FFT☆19Feb 18, 2019Updated 7 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆107Oct 31, 2022Updated 4 years ago
- ☆17Nov 11, 2015Updated 10 years ago
- CORDIC VLSI-IP for deep learning activation functions☆15Jul 13, 2019Updated 7 years ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆15Jul 23, 2020Updated 6 years ago
- Matrix Multiplication in Hardware☆17Jun 3, 2020Updated 6 years ago
- A generic implementation of AMBA AXI4 communication protocol. The design provides a master, a slave and an interconnect with multiple mas…☆45Aug 10, 2022Updated 4 years ago
- The example contains a Simulink model of a real-time BPSK transeiver for a voice application, based on a DVB-T dongles with an embedded R…☆12Oct 16, 2013Updated 13 years ago
- 无人船后台管理系统☆11Oct 4, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Radix-4 1024 point fft in verilog☆12Apr 29, 2020Updated 6 years ago
- Löwe FPGA Board☆12Oct 12, 2023Updated 3 years ago
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 11 years ago
- Fractional interpolation using a Farrow structure☆10Oct 11, 2023Updated 3 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 9 years ago
- GPIO IP core from opencores.☆12May 22, 2014Updated 12 years ago
- A high-throughput, parameterized, parallel crc hardware implementation.☆12Jun 2, 2024Updated 2 years ago
- Octave/MATLAB code for generating compensation FIR coefficients☆14Sep 7, 2015Updated 11 years ago
- Mathematical Functions in Verilog☆101Mar 7, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Using DSP cores as co-processor in GNU Radio.☆11Mar 12, 2014Updated 12 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- ☆12May 29, 2020Updated 6 years ago
- Sphinx extension for visual documentation of hardware written in HWT☆12Nov 12, 2025Updated 11 months ago
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- A Simulation for the performance of different modulation schemes, BPSK, QPSK, FSK, QAM(16-64) in an AWGN environment.☆10Mar 28, 2019Updated 7 years ago
- A CORDIC implementation of square root Verilog calculation on Quartus Prime 16.0, with ability to simulate on ModelSim as well.☆19Jul 24, 2021Updated 5 years ago