ericgineer / CORDIC
The CORDIC algorithm implemented in Octave/MATLAB and Verilog
☆29Updated 10 years ago
Alternatives and similar repositories for CORDIC:
Users that are interested in CORDIC are comparing it to the libraries listed below
- SPI-Flash XIP Interface (Verilog)☆37Updated 3 years ago
- RTL Verilog library for various DSP modules☆86Updated 3 years ago
- configurable cordic core in verilog☆49Updated 10 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆20Updated 6 years ago
- JESD204b modules in VHDL☆29Updated 6 years ago
- 100 MB/s Ethernet MAC Layer Switch☆14Updated 10 years ago
- Verilog SPI master and slave☆53Updated 9 years ago
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆19Updated 5 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆32Updated 5 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆31Updated 4 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- MIPI CSI-2 RX☆31Updated 3 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆20Updated 2 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆22Updated 7 years ago
- The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )☆14Updated 2 years ago
- Parameterised Asynchronous AHB3-Lite to APB4 Bridge.☆42Updated 11 months ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆70Updated 2 years ago
- Must-have verilog systemverilog modules☆33Updated 2 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- WISHBONE Interconnect☆11Updated 7 years ago
- Verilog I2C Slave☆23Updated 10 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆55Updated 2 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆53Updated 4 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆63Updated 4 years ago
- Single Port RAM, Dual Port RAM, FIFO☆24Updated 2 years ago
- DMA core compatible with AHB3-Lite☆10Updated 6 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆34Updated last year
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆41Updated last year
- ITMO SystemC & Verilog assignments - AMBA AHB and SPI☆21Updated 7 years ago