ericgineer / CORDIC
The CORDIC algorithm implemented in Octave/MATLAB and Verilog
☆28Updated 9 years ago
Alternatives and similar repositories for CORDIC:
Users that are interested in CORDIC are comparing it to the libraries listed below
- configurable cordic core in verilog☆48Updated 10 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆30Updated 4 years ago
- RTL Verilog library for various DSP modules☆84Updated 3 years ago
- I2C Master and Slave☆32Updated 9 years ago
- USB 2.0 Device IP Core☆59Updated 7 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆67Updated 2 years ago
- DMA core compatible with AHB3-Lite☆10Updated 5 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- QSPI for SoC☆20Updated 5 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆17Updated 6 years ago
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆18Updated 5 years ago
- A Verilog AMBA AHB Multilayer interconnect generator☆12Updated 7 years ago
- ☆35Updated 9 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆31Updated 3 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆62Updated 4 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen☆18Updated 10 years ago
- FPGA Technology Exchange Group相关文件管理☆43Updated last year
- A Voila-Jones face detector hardware implementation☆31Updated 6 years ago
- 100 MB/s Ethernet MAC Layer Switch☆14Updated 10 years ago
- SPI-Flash XIP Interface (Verilog)☆36Updated 3 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆11Updated 4 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆30Updated 6 years ago
- Parameterised Asynchronous AHB3-Lite to APB4 Bridge.☆41Updated 9 months ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆14Updated 4 years ago
- ITMO SystemC & Verilog assignments - AMBA AHB and SPI☆21Updated 7 years ago
- A 32 point radix-2 FFT module written in Verilog☆22Updated 4 years ago
- AHB DMA 32 / 64 bits☆52Updated 10 years ago
- UART -> AXI Bridge☆60Updated 3 years ago
- Delta-Sigma modulator (DSM) for fractional phase locked loop.☆26Updated 3 years ago