☆25Mar 27, 2022Updated 4 years ago
Alternatives and similar repositories for cortex_m3_on_xc7a100t
Users that are interested in cortex_m3_on_xc7a100t are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A tool to convert binary files to COE files 💫☆18Jun 24, 2026Updated 2 months ago
- SPI通信实现FLASH读写☆17Mar 18, 2020Updated 6 years ago
- ARM-CPU implemented verilog☆30Jan 13, 2024Updated 2 years ago
- This simulator framework is part of the DETERMINISTIC6G project: https://deterministic6g.eu/☆16Apr 19, 2026Updated 4 months ago
- RTT-Console for SEGGER Jlink☆20May 9, 2017Updated 9 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- SPI-Flash XIP Interface (Verilog)☆52Oct 24, 2021Updated 4 years ago
- IPASS -- Image Processing Algorithm Simulation Software☆12Jul 25, 2025Updated last year
- spi memory controller☆24Jan 5, 2017Updated 9 years ago
- Cortex_m0软核源码,可以在FPGA上直接跑,包含UART、定时器 这些外设,可以用keil写用户代码。可以看看《Cortex-M0 全可编程SoC原理及实现》这本书☆27Mar 15, 2021Updated 5 years ago
- Memory Compiler Tutorial☆14Oct 7, 2020Updated 5 years ago
- verilog实现CLAHE(限制对比度自适应直方图均衡化)算法,并进行资源优化,含vivado综合工程。 // Verilog implementation of CLAHE (Contrast Limited Adaptive Histogram…☆21Apr 30, 2026Updated 4 months ago
- Allows to reproduce the figures and the appendix of the paper "Correctly Modeling TX and RX Chain in (Distributed) Massive MIMO - New Fun…☆13Jun 30, 2022Updated 4 years ago
- A FPGA accelerated SDR receiver using PYNQ-Z2 board and RTL-SDR☆23Oct 22, 2019Updated 6 years ago
- Verilog Implementation of Otsu's algorithm☆14Jan 18, 2020Updated 6 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆20Jun 18, 2022Updated 4 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆22Nov 21, 2017Updated 8 years ago
- Verilog Repository for GIT☆37May 4, 2021Updated 5 years ago
- Implementation of the CMAC keyed hash function using AES as block cipher.☆16Apr 2, 2025Updated last year
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- asynchronous FIFO that support Non-symmetric aspect ratios(different read and write data widths), First-Word Fall-Through and data counte…☆26Oct 15, 2023Updated 2 years ago
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )☆19Dec 12, 2025Updated 8 months ago
- Simple hash table on Verilog (SystemVerilog)☆55Apr 3, 2016Updated 10 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Discover, setup, and get stats on network interfaces☆11Nov 17, 2023Updated 2 years ago
- PROGRAM_FTDI 是一个用于设置和管理 基于 FT232/FT2232/FT4232 的 Xilinx JTAG 设备的序列号信息 Windows Forms 应用程序☆19Nov 27, 2024Updated last year
- FPGA Technology Exchange Group相关文件管理☆68Jan 3, 2026Updated 8 months ago
- Microchip IEC/UL 60730 Class B Functional Safety Libraries - PIC32☆13Jan 4, 2016Updated 10 years ago
- This is the matlab code of deep convolutional neural networks (CNNs) for modulation classification of OFDM burst signals☆15Jun 3, 2021Updated 5 years ago
- Yet Another Debug Transport☆30Jul 4, 2026Updated 2 months ago
- RTL implementation of TFlite FPGA accelerator and RISC-V controller. 3D Object Detection based on LiDAR Point Clouds.☆17Jun 24, 2026Updated 2 months ago
- rt_memcpy Cortex-M 汇编加速版☆12Jun 9, 2022Updated 4 years ago
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Using STM32F303CCT6's on-chip 12-bit DAC to perform Direct Digital Synthesize☆17May 20, 2021Updated 5 years ago
- VHDL Modules☆24Mar 16, 2015Updated 11 years ago
- Generic AXI to APB bridge☆13Jul 17, 2014Updated 12 years ago
- Some knowledge about riscv rvv1.0,include rvv intrinsic examples☆17Dec 30, 2025Updated 8 months ago
- ☆22Oct 29, 2025Updated 10 months ago
- 💎 A 32-bit ARM Processor Implementation in Verilog HDL☆30Mar 21, 2022Updated 4 years ago
- 使用STM32的IO驱动VGA显示器实现了一个简单的交互和电脑鼠调试工具可添加其他工具☆20Apr 2, 2020Updated 6 years ago