Alternatives and similar repositories for digitaljs

Users that are interested in digitaljs are comparing it to the libraries listed below

• tilk / digitaljs_online
  Online demonstration for DigitalJS
  ☆139Updated last year
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆432Updated last year
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,468Updated 2 months ago
• tinyvision-ai-inc / UPduino-v3.0
  UPduino 3.0: new 4 layer layout, various other improvements
  ☆343Updated 9 months ago
• nturley / netlistsvg
  draws an SVG schematic from a JSON netlist
  ☆735Updated last year
• sylefeb / Silice
  Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…
  ☆1,380Updated 3 weeks ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,111Updated last week
• vmware-archive / cascade
  A Just-In-Time Compiler for Verilog from VMware Research
  ☆447Updated 4 years ago
• siliconcompiler / logik
  A configurable RTL to bitstream FPGA toolchain
  ☆46Updated this week
• dawsonjon / Chips-2.0
  FPGA Design Suite based on C to Verilog design flow.
  ☆246Updated 6 years ago
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,420Updated 3 months ago
• hdl-util / hdmi
  Send video/audio over HDMI on an FPGA
  ☆1,205Updated last year
• siliconcompiler / siliconcompiler
  Modular hardware build system
  ☆1,093Updated last week
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆901Updated 2 years ago
• openhwgroup / cva6
  The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…
  ☆2,649Updated this week
• olofk / edalize
  An abstraction library for interfacing EDA tools
  ☆716Updated last week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,659Updated last week
• YosysHQ / nextpnr
  nextpnr portable FPGA place and route tool
  ☆1,532Updated this week
• MoonbaseOtago / vroom
  VRoom! RISC-V CPU
  ☆511Updated last year
• RTimothyEdwards / magic
  Magic VLSI Layout Tool
  ☆575Updated this week
• drom / awesome-hdl
  Hardware Description Languages
  ☆1,069Updated 3 months ago
• Redcrafter / verilog2factorio
  This project will compile verilog (a hardware description language) into factorio blueprints.
  ☆787Updated 8 months ago
• bluespec / Flute
  RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
  ☆374Updated 2 years ago
• os-fpga / 1st-CLaaS
  Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications
  ☆205Updated last month
• olofk / fusesoc
  Package manager and build abstraction tool for FPGA/ASIC development
  ☆1,344Updated 2 weeks ago
• litex-hub / fpga_101
  FPGA 101 lessons/labs
  ☆393Updated last year
• ghdl / ghdl-yosys-plugin
  VHDL synthesis (based on ghdl)
  ☆347Updated 2 weeks ago
• YosysHQ / oss-cad-suite-build
  Multi-platform nightly builds of open source digital design and verification tools
  ☆1,204Updated this week
• nickg / nvc
  VHDL compiler and simulator
  ☆744Updated last week
• PrincetonUniversity / openpiton
  The OpenPiton Platform
  ☆732Updated last month