Open source machine learning accelerators
☆397Mar 24, 2024Updated 2 years ago
Alternatives and similar repositories for tensil
Users that are interested in tensil are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Dataflow compiler for QNN inference on FPGAs☆972Updated this week
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆207Jun 25, 2020Updated 5 years ago
- Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrol…☆549Feb 26, 2026Updated last month
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆11Dec 16, 2021Updated 4 years ago
- For contributions of Chisel IP to the chisel community.☆73Nov 7, 2024Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago
- CNN accelerator implemented with Spinal HDL☆158Jan 29, 2024Updated 2 years ago
- ☆66Apr 30, 2025Updated 11 months ago
- Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated☆238Dec 22, 2025Updated 3 months ago
- Open, Modular, Deep Learning Accelerator☆338Apr 10, 2024Updated 2 years ago
- (System)Verilog to Chisel translator☆120May 20, 2022Updated 3 years ago
- Antmicro's fast, vendor-neutral DMA IP in Chisel☆130Mar 6, 2026Updated last month
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆227Apr 22, 2019Updated 6 years ago
- A open source reimplementation of Google's Tensor Processing Unit (TPU).☆746Dec 6, 2017Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Berkeley's Spatial Array Generator☆1,279Mar 29, 2026Updated 3 weeks ago
- Chisel components for FPGA projects☆129Sep 19, 2023Updated 2 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆380Jan 20, 2025Updated last year
- A DSL for Systolic Arrays☆85Dec 14, 2018Updated 7 years ago
- Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy☆408Updated this week
- A dynamic verification library for Chisel.☆161Nov 9, 2024Updated last year
- ☆18Jan 22, 2025Updated last year
- Implementation of the Advanced Encryption Standard in Chisel☆19Apr 18, 2022Updated 4 years ago
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆62Dec 3, 2021Updated 4 years ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,219Apr 1, 2026Updated 2 weeks ago
- A Library of Chisel3 Tools for Digital Signal Processing☆245Apr 29, 2024Updated last year
- high-performance RTL simulator☆190Jun 19, 2024Updated last year
- PyTorch model to RTL flow for low latency inference☆131Mar 15, 2024Updated 2 years ago
- Machine learning on FPGAs using HLS☆1,939Apr 10, 2026Updated last week
- Dataflow QNN inference accelerator examples on FPGAs☆252Mar 10, 2026Updated last month
- Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…☆20Jan 21, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆72Dec 29, 2025Updated 3 months ago
- SpinalHDL Hardware Math Library☆99Jul 12, 2024Updated last year
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆235Aug 19, 2024Updated last year
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆336Jan 20, 2025Updated last year
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆149Dec 25, 2019Updated 6 years ago
- Sparse CNN Accelerator targeting Intel FPGA☆14Aug 26, 2021Updated 4 years ago
- chipyard in mill :P☆77Nov 20, 2023Updated 2 years ago