Alternatives and similar repositories for tensil

Users that are interested in tensil are comparing it to the libraries listed below

• UCSBarchlab / OpenTPU
  A open source reimplementation of Google's Tensor Processing Unit (TPU).
  ☆723Updated 8 years ago
• jofrfu / tinyTPU
  Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  ☆530Updated 7 years ago
• google / CFU-Playground
  Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrol…
  ☆539Updated 9 months ago
• sld-columbia / esp
  Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
  ☆398Updated 2 months ago
• tenstorrent / riscv-ocelot
  Ocelot: The Berkeley Out-of-Order Machine With V-EXT support
  ☆208Updated 3 weeks ago
• ztachip / ztachip
  Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.
  ☆282Updated this week
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆241Updated 4 months ago
• cameronshinn / tiny-tpu
  Small-scale Tensor Processing Unit built on an FPGA
  ☆214Updated 6 years ago
• HLSTransform / submission
  ☆117Updated last year
• KastnerRG / pp4fpgas
  Parallel Programming for FPGAs -- An open-source high-level synthesis book
  ☆867Updated last month
• danielholanda / LeFlow
  Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
  ☆620Updated 6 years ago
• efabless / caravel
  Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.
  ☆370Updated 10 months ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆213Updated 3 weeks ago
• intel / fpga-npu
  ☆233Updated last year
• pymtl / pymtl3
  Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
  ☆439Updated 4 months ago
• apache / tvm-vta
  Open, Modular, Deep Learning Accelerator
  ☆320Updated last year
• aliemo / transfomers-silicon-research
  Research and Materials on Hardware implementation of Transformer Model
  ☆295Updated 10 months ago
• bespoke-silicon-group / bsg_manycore
  Tile based architecture designed for computing efficiency, scalability and generality
  ☆276Updated 3 months ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆235Updated 4 months ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆374Updated 11 months ago
• fastmachinelearning / hls4ml-tutorial
  Tutorial notebooks for hls4ml
  ☆398Updated 2 weeks ago
• NNgen / nngen
  NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
  ☆357Updated 2 years ago
• Xilinx / HLS
  Vitis HLS LLVM source code and examples
  ☆403Updated 3 months ago
• bu-icsg / dana
  Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
  ☆219Updated 5 years ago
• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆168Updated 2 years ago
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆437Updated 6 years ago
• mflowgen / mflowgen
  mflowgen -- A Modular ASIC/FPGA Flow Generator
  ☆275Updated last month
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆236Updated 3 years ago
• SingularityKChen / dl_accelerator
  Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions
  ☆206Updated 5 years ago
• makslevental / openhls
  PyTorch model to RTL flow for low latency inference
  ☆131Updated last year