Alternatives and similar repositories for RAFT

Users that are interested in RAFT are comparing it to the libraries listed below

• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆27Updated last year
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆36Updated last year
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆57Updated this week
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆13Updated 2 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆60Updated 2 years ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆31Updated 2 years ago
• suoto / fpga_cores
  ☆32Updated 2 years ago
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆64Updated last week
• efard / DSPHDL
  ☆41Updated last year
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆33Updated 2 months ago
• JennySmith888 / 100GBE-PYNQ
  ☆19Updated 3 years ago
• paulscherrerinstitute / VivadoScripting
  Python Utilities to use Xilinx Vivado Tools from Python Scripts
  ☆17Updated 4 years ago
• Xilinx / chipscopy
  ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…
  ☆54Updated 3 months ago
• maltevesper / JetStream-hardware
  ☆22Updated 8 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆21Updated 7 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆100Updated last year
• os-fpga / FOEDAG
  Framework Open EDA Gui
  ☆65Updated 5 months ago
• Xilinx / RFSoC-MTS
  A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).
  ☆23Updated last year
• missinglinkelectronics / fpga-vbs
  Vivado build system
  ☆68Updated 4 months ago
• enclustra / en_cl_fix
  Fixed-point math library with VHDL, Python and MATLAB support
  ☆22Updated 2 months ago
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆28Updated 4 years ago
• VLSI-EDA / PoC-Examples
  This repository contains synthesizable examples which use the PoC-Library.
  ☆37Updated 4 years ago
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆16Updated 2 years ago
• hVHDL / hVHDL_example_project
  An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…
  ☆27Updated 4 months ago
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆74Updated this week
• mcjtag / axis-uart
  AXI Stream UART (verilog)
  ☆11Updated 5 years ago
• delhatch / Zynq_UDP
  Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.
  ☆25Updated 4 years ago
• Xilinx / PYNQ-ZU
  PYNQ-ZU, AUP UltraScale+ MPSoC academic board
  ☆23Updated 2 weeks ago
• Xilinx / xup_fpga_vivado_flow
  AMD Xilinx University Program Vivado tutorial
  ☆39Updated 2 years ago