Alternatives and similar repositories for zynqmp-arch

Users that are interested in zynqmp-arch are comparing it to the libraries listed below

• BerkeleyLab / XVC-FTDI-JTAG
  Xilinx virtual cable server for generic FTDI 4232H.
  ☆59Updated last year
• ultraembedded / core_usb_cdc
  Basic USB-CDC device core (Verilog)
  ☆80Updated 4 years ago
• kazkojima / pcm2pdm-example
  A tiny example of PCM to PDM pipeline on FPGA
  ☆22Updated 3 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆28Updated 4 years ago
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆82Updated last year
• kholia / xvcpi
  Use Raspberry Pi as a wireless Xilinx JTAG 'cable'. Note: This is a portable, tested, maintained clone of https://github.com/strongleg/xv…
  ☆44Updated 4 years ago
• freecores / usbhostslave
  USB 1.1 Host and Function IP core
  ☆24Updated 11 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆96Updated 5 years ago
• CospanDesign / sdio-device
  ☆19Updated 7 years ago
• tow3rs / jtag-mpsse-blaster
  Use an MPSSE FTDI device as a JTAG interface in Quartus tools
  ☆28Updated last year
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated last year
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆32Updated 5 years ago
• CospanDesign / nysa-sdio-device
  SDIO Device Verilog Core
  ☆22Updated 7 years ago
• ultraembedded / core_usb_uart
  USB serial device (CDC-ACM)
  ☆42Updated 5 years ago
• esynr3z / usb20dev
  USB 2.0 FS Device controller IP core written in SystemVerilog
  ☆37Updated 6 years ago
• derekmulcahy / xvcpi
  Xilinx Virtual Cable Server for Raspberry Pi
  ☆120Updated 3 years ago
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆65Updated 3 years ago
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆82Updated 5 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆66Updated last month
• CospanDesign / nysa-verilog
  Verilog Repository for GIT
  ☆33Updated 4 years ago
• openXC7 / nextpnr-xilinx
  Experimental flows using nextpnr for Xilinx devices
  ☆51Updated this week
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆48Updated 5 years ago
• Parretto / DisplayPort
  DisplayPort IP-core
  ☆83Updated 2 months ago
• OldRepoPreservation / mpeg2fpga
  An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.
  ☆25Updated 6 years ago
• j-marjanovic / jtag-quartus-ft232h
  ☆54Updated 3 years ago
• ZipCPU / interpolation
  Digital Interpolation Techniques Applied to Digital Signal Processing
  ☆67Updated last year
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆46Updated 4 years ago
• wuhanstudio / picorv32_tang
  A 32-bit RISC-V SoC on FPGA that supports RT-Thread.
  ☆29Updated 2 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆81Updated 5 years ago
• fjullien / jtag_vpi
  TCP/IP controlled VPI JTAG Interface.
  ☆69Updated 10 months ago