An innovative Verilog-A compiler - reloaded
☆38Feb 24, 2026Updated last week
Alternatives and similar repositories for OpenVAF
Users that are interested in OpenVAF are comparing it to the libraries listed below
Sorting:
- Verilog-A simulation models☆93Feb 24, 2026Updated last week
- An innovative Verilog-A compiler☆181Aug 20, 2024Updated last year
- ☆20Apr 19, 2024Updated last year
- ☆26Dec 4, 2025Updated 2 months ago
- Hardware Description Library☆87Feb 17, 2026Updated 2 weeks ago
- OpenVAF revived by community☆22Jul 21, 2025Updated 7 months ago
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆23Jan 6, 2026Updated last month
- RFIC EM simulation: Create AWS Palace model from GDSII layout files☆35Feb 12, 2026Updated 2 weeks ago
- COCOA: Collaborative Compendium on Analog Integrated Circuits☆25Jan 14, 2026Updated last month
- A tiny Python package to parse spice raw data files.☆53Dec 26, 2022Updated 3 years ago
- repository for a bandgap voltage reference in SKY130 technology☆42Jan 20, 2023Updated 3 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆72Feb 23, 2026Updated last week
- Primitives for GF180MCU provided by GlobalFoundries.☆12Jul 6, 2025Updated 7 months ago
- Python bindings for controlling MPI probe stations☆10Feb 9, 2026Updated 3 weeks ago
- KLayoutPhotonicPCells Core Library. Functionallities to extend KLayout PCells for Photonics☆10Jan 10, 2020Updated 6 years ago
- gnucap mirror (read only)☆31Feb 7, 2026Updated 3 weeks ago
- An Open-Source ASIC Design Template for the SG13G2 IHP Open-PDK.☆17Feb 20, 2026Updated last week
- This library is a low level parser for the OpenAccess file format.☆15Jun 24, 2017Updated 8 years ago
- Tapeouts done using OpenFASOC☆16Nov 3, 2025Updated 3 months ago
- gdsfactory implementation of LXT PDK.☆17Updated this week
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆50Sep 8, 2025Updated 5 months ago
- Characterizer☆31Nov 19, 2025Updated 3 months ago
- Parasitic Extraction for KLayout☆39Feb 20, 2026Updated last week
- Generate SVG schematics and block diagrams without a mouse.☆31Jul 5, 2025Updated 7 months ago
- A python3 gm/ID starter kit☆65Jan 26, 2026Updated last month
- A set of rules and recommendations for analog and digital circuit designers.☆31Nov 4, 2024Updated last year
- Efabless mpw7 submission☆15May 6, 2024Updated last year
- Hdl21 Schematics☆16Jan 24, 2024Updated 2 years ago
- The Berkeley Verilog-A Parser and Processor☆15Mar 24, 2017Updated 8 years ago
- Interchange formats for chip design.☆36Feb 15, 2026Updated 2 weeks ago
- gaw3-20200922 fork with patches to improve remote commands sent from xschem to display waveforms☆17Mar 28, 2025Updated 11 months ago
- Fully defined liberty (std. cells in VLSI) data structure, efficient parser & formatter☆23Feb 24, 2026Updated last week
- Parasitic capacitance analysis of foundry metal stackups☆17Jan 12, 2026Updated last month
- Minimal Python module to assist setting up FDTD simulation using Tidy3D and Lumerical on planar nanophotonic devices.☆25Dec 22, 2025Updated 2 months ago
- ☆20Jul 15, 2024Updated last year
- Coriolis VLSI EDA Tool (LIP6)☆81Jan 25, 2026Updated last month
- A Python parser for hSpice output files and documentation of the hSpice output file format☆22Jan 5, 2026Updated last month
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆47Feb 21, 2026Updated last week
- An OASIS and GDS2 (chip layout format) binary dump tool for debugging☆46Dec 5, 2017Updated 8 years ago