Alternatives and similar repositories for underserved

Users that are interested in underserved are comparing it to the libraries listed below

• shalan / Awesome-Sky130-IPs
  ☆14Updated 2 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆37Updated 3 years ago
• wyvernSemi / riscV
  Open source ISS and logic RISC-V 32 bit project
  ☆60Updated 2 weeks ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• pulp-platform / cheshire-ihp130-o
  ☆58Updated 10 months ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆24Updated 5 years ago
• wulffern / tt06-sar
  SAR ADC on tiny tapeout
  ☆45Updated last year
• aignacio / nox
  RISC-V Nox core
  ☆71Updated 6 months ago
• snishizawa / libretto
  Characterizer
  ☆31Updated 2 months ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆22Updated 2 years ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆52Updated 9 months ago
• RClabiisc / I2SRV64-SS-v1
  Reconfigurable Computing Lab, DESE, Indian Institiute of Science
  ☆27Updated last year
• RClabiisc / I2SRV32-V-v1
  Reconfigurable Computing Lab, DESE, Indian Institiute of Science
  ☆32Updated last year
• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆74Updated 3 years ago
• manili / VSDBabySoC
  VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
  ☆51Updated 4 years ago
• vsdip / avsddac_3v3_sky130_v2
  ☆17Updated 3 years ago
• Youssefmdany / RISC-V-Single-Cycle-Processor-Integrated-With-a-Cache-Memory-System-From-RTL-To-GDS
  RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS
  ☆11Updated last year
• IHP-GmbH / IHP-Open-DesignLib
  Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/
  ☆64Updated 5 months ago
• TinyTapeout / tinytapeout-ihp-0p1
  Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process
  ☆19Updated 10 months ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆79Updated 5 years ago
• The-OpenROAD-Project / megaboom
  ☆33Updated this week
• vsdip / avsddac_3v3_sky130_v1
  ☆13Updated 3 years ago
• IUST-Computer-Organization / LUMOS
  Light Utilization with Multicycle Operational Stages (LUMOS) RISC-V Processor
  ☆48Updated last year
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆56Updated 4 years ago
• tub-msc / ordec
  Custom IC Design Platform
  ☆46Updated last week
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆31Updated 2 years ago
• kiwih / qtcore-C1
  ☆47Updated 2 years ago
• mole99 / greyhound-ihp
  Greyhound on IHP SG13G2 0.13 μm BiCMOS process
  ☆80Updated last week
• avidan-efody / wave_rerunner
  Code to read various RTL simulator wave formats (fsdb, shm, vcd, wlf) into python and apply it as stimuli via cocotb/plain vpi.
  ☆63Updated 4 years ago
• pulp-platform / svase
  ☆33Updated last year