stffrdhrn / adc_interfaceLinks
Verilog ADC interface for adc128s022 found in De0 Nano
☆14Updated 10 years ago
Alternatives and similar repositories for adc_interface
Users that are interested in adc_interface are comparing it to the libraries listed below
Sorting:
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Updated 2 years ago
- Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.☆98Updated 5 months ago
- A current mode buck converter on the SKY130 PDK☆34Updated 4 years ago
- HARV - HArdened Risc-V☆15Updated 3 years ago
- ☆11Updated last year
- ☆43Updated 3 years ago
- Drawio => VHDL and Verilog☆61Updated 2 years ago
- Trying to get a new skill☆27Updated 11 months ago
- ☆31Updated last month
- tinyVision.ai Vision & Sensor FPGA System on Module☆45Updated 4 years ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…☆81Updated 2 years ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆144Updated 2 years ago
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆38Updated 4 years ago
- Python script to transform a VCD file to wavedrom format☆82Updated 3 years ago
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆17Updated 3 years ago
- Flip flop setup, hold & metastability explorer tool☆51Updated 3 years ago
- A mixed-signal system on chip for nanopore-based DNA sequencing☆36Updated 3 years ago
- ☆26Updated 2 years ago
- A reference book on System-on-Chip Design☆37Updated 6 months ago
- Extensible FPGA control platform☆61Updated 2 years ago
- Design and implementation of an 8-bit SAR (Successive Approximation Register) ADC☆26Updated 7 years ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆41Updated 7 years ago
- This is this VLSI designing Project. This Project is created in Cadence Virtuoso. See the PDF for Pre-Post layout results and other detai…☆35Updated 6 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆65Updated last year
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆112Updated 5 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆49Updated 3 years ago
- Simple RiscV core for academic purpose.☆23Updated 5 years ago
- Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA☆72Updated 5 years ago