General purpose IO port with AXI4-Lite interface
☆10Feb 7, 2025Updated last year
Alternatives and similar repositories for axi4lite_gpio
Users that are interested in axi4lite_gpio are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- uvm_starter is a simple template for starting uvm projects☆12Feb 11, 2025Updated last year
- uvm_apb is a uvm package for modeling and verifying APB (Advanced Periperal Bus) protocol☆21Feb 7, 2025Updated last year
- uvm_axi is a uvm package for modeling and verifying AXI protocol☆22Feb 7, 2025Updated last year
- uvm_axi4lite is a uvm package for modeling and verifying AXI4 Lite protocol☆34Feb 7, 2025Updated last year
- 位宽和深度可定制的异步FIFO☆14May 29, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Parametric GPIO Peripheral☆12Jan 30, 2025Updated last year
- This is a 4*5 PE array for LeNet accelerator based on FPGA.☆13Jul 20, 2022Updated 3 years ago
- 包括同步FIFO（输入输出位宽相同），异步FIFO（输入输出位宽相同），异步FIFO（能实现输出数据位宽是输入数据位宽的1/2或2倍）☆25Nov 7, 2022Updated 3 years ago
- A simple program to convert gdsII files to vector output formats. Currently used to create laser-cut models of standard cells.☆12May 30, 2023Updated 2 years ago
- A simple implementation about LEGv8 instruction set using Verilog HDL.☆12May 8, 2022Updated 4 years ago
- KASIRGA - GUN | RV32IMCX☆12Aug 14, 2024Updated last year
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆24Nov 7, 2018Updated 7 years ago
- Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.☆32Aug 28, 2023Updated 2 years ago
- Using python, selenium to get real photo paths and download them.☆11Aug 7, 2017Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Summer School Week 1 & 2 repo☆12Jul 1, 2022Updated 3 years ago
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 10 months ago
- Software for high density electrophysiology☆31Jan 24, 2025Updated last year
- Bu depo TEKNOFEST 2023 Çip Tasarım Yarışması'nda Analog Tasarım ve Sayısal İşlemci Tasarımı kategorilerinde çeşitli dosyaları paylaşmak i…☆22Apr 13, 2023Updated 3 years ago
- Master and Slave made using AMBA AXI4 Lite protocol.☆31Oct 9, 2020Updated 5 years ago
- A python project to automatically generate the UVM testbench document.☆21Feb 27, 2024Updated 2 years ago
- Maven Silicon Project☆19Oct 13, 2018Updated 7 years ago
- A Pandora Radio Client that also saves music to disk☆17Oct 26, 2015Updated 10 years ago
- Contains commonly used UVM components (agents, environments and tests).☆33Aug 17, 2018Updated 7 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- DDR3 function verification environment in UVM☆26Apr 1, 2018Updated 8 years ago
- a very simple risc_cpu verification demo with uvm☆27Apr 28, 2019Updated 7 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- ☆29Sep 3, 2025Updated 8 months ago
- ☆24Dec 8, 2021Updated 4 years ago
- AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream t…☆152May 16, 2026Updated last week
- UART -> AXI Bridge☆74Jul 1, 2021Updated 4 years ago
- Create WaveJSON from VCD file. WaveDrom can convert it to timing diagram.☆42Jul 24, 2024Updated last year
- Python implementation of signal processing techniques and K-means clustering to sort spikes.☆84Jun 6, 2019Updated 6 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆39Apr 10, 2023Updated 3 years ago
- A small utility to download images from gettyimages☆38Jul 15, 2020Updated 5 years ago
- Top-level repository for the ACT EDA flow☆38Updated this week
- Verification IP for I2C protocol☆52Sep 22, 2021Updated 4 years ago
- amba3 apb/axi vip☆52Feb 24, 2015Updated 11 years ago
- This store contains Configurable Example Designs.☆54Updated this week
- Generate UVM register model from compiled SystemRDL input☆61Nov 25, 2025Updated 6 months ago