Alternatives and similar repositories for rogue

Users that are interested in rogue are comparing it to the libraries listed below

• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆77Updated 2 weeks ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆64Updated last week
• ipbus / ipbus-firmware
  Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol
  ☆43Updated 2 months ago
• dspsandbox / FPGA-Notes-for-Scientists
  ☆39Updated 2 months ago
• ipbus / ipbus-software
  Software that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol
  ☆24Updated last month
• VHDL / pyVHDLModel
  An abstract language model of VHDL written in Python.
  ☆56Updated 2 months ago
• capn-freako / PyBERT
  Serial communication link bit error rate tester simulator, written in Python.
  ☆114Updated 2 weeks ago
• hdl / conda-eda
  Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
  ☆102Updated 7 months ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• FPHDL / fphdl
  VHDL-2008 Support Library
  ☆57Updated 8 years ago
• wallento / wavedrompy
  WaveDrom compatible python command line
  ☆108Updated 2 years ago
• PyFPGA / pyfpga
  A Python package to use FPGA development tools programmatically.
  ☆139Updated 5 months ago
• TripRichert / viv-prj-gen
  tcl scripts used to build or generate vivado projects automatically
  ☆33Updated 2 years ago
• smlgit / fpbinary
  Fixed point package for Python.
  ☆35Updated 2 years ago
• os-fpga / FOEDAG
  Framework Open EDA Gui
  ☆68Updated 9 months ago
• hVHDL / hVHDL_example_project
  An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…
  ☆29Updated 8 months ago
• Nic30 / hwtLib
  hardware library for hwt (= ipcore repo)
  ☆43Updated this week
• ipbus / ipbb
  IPbus Builder Tool
  ☆14Updated 3 weeks ago
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆61Updated last year
• paulscherrerinstitute / VivadoScripting
  Python Utilities to use Xilinx Vivado Tools from Python Scripts
  ☆19Updated 4 years ago
• Xilinx / XilinxCEDStore
  This store contains Configurable Example Designs.
  ☆49Updated last week
• intel / multi_power_sequencer
  Multi-Rail Power Sequencer, capable of monitoring and sequencing up to 144 power rails, offers a configurable and rich set of features, s…
  ☆19Updated 4 months ago
• SiLab-Bonn / basil
  A data acquisition framework in Python and Verilog.
  ☆42Updated last month
• accellera-official / PySysC
  Public repository for PySysC, (From SC Common Practices Subgroup)
  ☆54Updated last year
• OSVVM / OsvvmLibraries
  Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
  ☆67Updated last week
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆30Updated 2 years ago
• Paebbels / pyVHDLParser
  Streaming based VHDL parser.
  ☆84Updated last year
• Avnet / petalinux
  Repository used to support automated builds under PetaLinux tools that use Yocto.
  ☆61Updated 5 months ago
• gdsfactory / skywater130
  skywater 130nm pdk
  ☆34Updated this week
• edaa-org / pyEDAA.IPXACT
  An IP-XACT DOM for IEEE 1685-2014 in Python.
  ☆30Updated last week